From patchwork Thu Aug 23 06:10:29 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hiroshi DOYU X-Patchwork-Id: 1416621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 05339DFFCF for ; Thu, 6 Sep 2012 16:06:03 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T9eJ1-00079p-KV; Thu, 06 Sep 2012 15:47:48 +0000 Received: from hqemgate04.nvidia.com ([216.228.121.35]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T4QdX-0001nz-J9 for linux-arm-kernel@lists.infradead.org; Thu, 23 Aug 2012 06:11:26 +0000 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Wed, 22 Aug 2012 23:10:22 -0700 Received: from hqemhub03.nvidia.com ([172.17.108.22]) by hqnvupgp07.nvidia.com (PGP Universal service); Wed, 22 Aug 2012 23:05:08 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Wed, 22 Aug 2012 23:05:08 -0700 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQEMHUB03.nvidia.com (172.20.150.15) with Microsoft SMTP Server id 8.3.264.0; Wed, 22 Aug 2012 23:11:01 -0700 Received: from daphne.nvidia.com (Not Verified[172.16.212.96]) by hqnvemgw02.nvidia.com with MailMarshal (v6,7,2,8378) id ; Wed, 22 Aug 2012 23:11:48 -0700 Received: from oreo.Nvidia.com (dhcp-10-21-25-186.nvidia.com [10.21.25.186]) by daphne.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id q7N6AcIT004834; Wed, 22 Aug 2012 23:10:57 -0700 (PDT) From: Hiroshi Doyu To: Subject: [v2 4/4] ARM: dma-mapping: IOMMU allocates pages from atomic_pool with GFP_ATOMIC Date: Thu, 23 Aug 2012 09:10:29 +0300 Message-ID: <1345702229-9539-5-git-send-email-hdoyu@nvidia.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1345702229-9539-1-git-send-email-hdoyu@nvidia.com> References: <1345702229-9539-1-git-send-email-hdoyu@nvidia.com> MIME-Version: 1.0 X-Bad-Reply: References and In-Reply-To but no 'Re:' in Subject. X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.1 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [216.228.121.35 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.2 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-Mailman-Approved-At: Thu, 06 Sep 2012 10:43:49 -0400 Cc: linux@arm.linux.org.uk, arnd@arndb.de, konrad.wilk@oracle.com, chunsang.jeong@linaro.org, minchan@kernel.org, linux-kernel@vger.kernel.org, subashrp@gmail.com, linaro-mm-sig@lists.linaro.org, linux-mm@kvack.org, kyungmin.park@samsung.com, pullip.cho@samsung.com, linux-arm-kernel@lists.infradead.org, Hiroshi Doyu X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Makes use of the same atomic pool from DMA, and skips kernel page mapping which can involve sleep'able operations at allocating a kernel page table. Signed-off-by: Hiroshi Doyu --- arch/arm/mm/dma-mapping.c | 30 +++++++++++++++++++++++++----- 1 files changed, 25 insertions(+), 5 deletions(-) diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 7ab016b..433312a 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -1063,7 +1063,6 @@ static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, struct page **pages; int count = size >> PAGE_SHIFT; int array_size = count * sizeof(struct page *); - int err; if ((array_size <= PAGE_SIZE) || (gfp & GFP_ATOMIC)) pages = kzalloc(array_size, gfp); @@ -1072,9 +1071,20 @@ static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, if (!pages) return NULL; - err = __alloc_fill_pages(&pages, count, gfp); - if (err) - goto error + if (gfp & GFP_ATOMIC) { + struct page *page; + int i; + void *addr = __alloc_from_pool(size, &page); + if (!addr) + goto error; + + for (i = 0; i < count; i++) + pages[i] = page + i; + } else { + int err = __alloc_fill_pages(&pages, count, gfp); + if (err) + goto error; + } return pages; @@ -1091,9 +1101,15 @@ static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t s int count = size >> PAGE_SHIFT; int array_size = count * sizeof(struct page *); int i; + + if (__free_from_pool(page_address(pages[0]), size)) + goto out; + for (i = 0; i < count; i++) if (pages[i]) __free_pages(pages[i], 0); + +out: if ((array_size <= PAGE_SIZE) || __in_atomic_pool(page_address(pages[0]), size)) kfree(pages); @@ -1221,6 +1237,9 @@ static void *arm_iommu_alloc_attrs(struct device *dev, size_t size, if (*handle == DMA_ERROR_CODE) goto err_buffer; + if (gfp & GFP_ATOMIC) + return page_address(pages[0]); + if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) return pages; @@ -1279,7 +1298,8 @@ void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr, return; } - if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) { + if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs) || + !__in_atomic_pool(cpu_addr, size)) { unmap_kernel_range((unsigned long)cpu_addr, size); vunmap(cpu_addr); }