From patchwork Thu Aug 23 09:29:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1365421 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 2FAE2DF2AB for ; Thu, 23 Aug 2012 09:33:52 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T4TkC-0000AK-Cb; Thu, 23 Aug 2012 09:30:28 +0000 Received: from na3sys009aog114.obsmtp.com ([74.125.149.211]) by merlin.infradead.org with smtps (Exim 4.76 #1 (Red Hat Linux)) id 1T4TjJ-0008Oo-Ps for linux-arm-kernel@lists.infradead.org; Thu, 23 Aug 2012 09:29:34 +0000 Received: from mail-ob0-f175.google.com ([209.85.214.175]) (using TLSv1) by na3sys009aob114.postini.com ([74.125.148.12]) with SMTP ID DSNKUDX3/PXYE8A3OvfisEV+3UGbPc0ezvw2@postini.com; Thu, 23 Aug 2012 02:29:33 PDT Received: by obc16 with SMTP id 16so1155495obc.20 for ; Thu, 23 Aug 2012 02:29:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=MtENfuGD6hikRlaFzHD6RsKTXKzcHvuR9jv2+yUIyxY=; b=ZE5Jzcy/6oyzN3zJCG+KB2Gtle/u6EDJV11Uhyf6/y8vFgQ31wffJ/GLLpwfS+swUi Dq02NF1j47KaMGIrjX1c5djzJ1NHhm7F5PDaKz/K2+jacPaRYzw2srKDKN/SSNZUMcjb cp5RZFvEL20pRrMOck+db+TB4ZOQYZhjVGelZz7uUpMDj1fxazw0JsESDzAWtSS13S7B LTKHKroSxljROwForRYk3dIH+vrSi7wBy+VFsFwK0FnMmTcs0xL5yA2G4aLeGPRoFdz6 jnmDBEeeu8yT4LuHd6UKgRgTKmB/gLc2+juTt23PW4H9xejyGnomFHtw00CVONg6Alqs l3bA== Received: by 10.182.118.8 with SMTP id ki8mr537425obb.79.1345714171777; Thu, 23 Aug 2012 02:29:31 -0700 (PDT) Received: from barack.emea.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id jl8sm6208199obb.18.2012.08.23.02.29.29 (version=SSLv3 cipher=OTHER); Thu, 23 Aug 2012 02:29:31 -0700 (PDT) From: Peter Ujfalusi To: Tony Lindgren Subject: [PATCH 4/6] ARM/dts: OMAP4: Add McBSP entries Date: Thu, 23 Aug 2012 12:29:11 +0300 Message-Id: <1345714153-13094-5-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.7.8.6 In-Reply-To: <1345714153-13094-1-git-send-email-peter.ujfalusi@ti.com> References: <1345714153-13094-1-git-send-email-peter.ujfalusi@ti.com> X-Gm-Message-State: ALoCoQmxJO8bAfTV4fkFGF7SrZ3bHJ9MW56EZR+8r76XB5qtov3x9vb51j5C4Lv9GF9Ag4QnHYsL X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [74.125.149.211 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: devicetree-discuss@lists.ozlabs.org, linux-omap@vger.kernel.org, Benoit Cousson , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi --- arch/arm/boot/dts/omap4.dtsi | 47 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 47 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 04cbbcb..258435f 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -295,5 +295,52 @@ interrupt-parent = <&gic>; ti,hwmods = "dmic"; }; + + mcbsp1: mcbsp@40122000 { + compatible = "ti,omap4-mcbsp"; + reg = <0x40122000 0xff>, /* MPU private access */ + <0x49022000 0xff>; /* L3 Interconnect */ + reg-names = "mpu", "dma"; + interrupts = <0 17 0x4>; + interrupt-names = "common"; + interrupt-parent = <&gic>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp1"; + }; + + mcbsp2: mcbsp@40124000 { + compatible = "ti,omap4-mcbsp"; + reg = <0x40124000 0xff>, /* MPU private access */ + <0x49024000 0xff>; /* L3 Interconnect */ + reg-names = "mpu", "dma"; + interrupts = <0 22 0x4>; + interrupt-names = "common"; + interrupt-parent = <&gic>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp2"; + }; + + mcbsp3: mcbsp@40126000 { + compatible = "ti,omap4-mcbsp"; + reg = <0x40126000 0xff>, /* MPU private access */ + <0x49026000 0xff>; /* L3 Interconnect */ + reg-names = "mpu", "dma"; + interrupts = <0 23 0x4>; + interrupt-names = "common"; + interrupt-parent = <&gic>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp3"; + }; + + mcbsp4: mcbsp@48096000 { + compatible = "ti,omap4-mcbsp"; + reg = <0x48096000 0xff>; /* L4 Interconnect */ + reg-names = "mpu"; + interrupts = <0 16 0x4>; + interrupt-names = "common"; + interrupt-parent = <&gic>; + ti,buffer-size = <128>; + ti,hwmods = "mcbsp4"; + }; }; };