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[62.78.217.178]) by mx.google.com with ESMTPS id ba4sm1780105lbb.14.2012.08.23.03.38.04 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 23 Aug 2012 03:38:04 -0700 (PDT) From: Felipe Balbi To: alan@linux.intel.com Subject: [PATCH v3 23/23] serial: omap: enable RX and TX FIFO usage Date: Thu, 23 Aug 2012 13:33:03 +0300 Message-Id: <1345717983-18179-24-git-send-email-balbi@ti.com> X-Mailer: git-send-email 1.7.12.rc3 In-Reply-To: <1345717983-18179-1-git-send-email-balbi@ti.com> References: <1345717983-18179-1-git-send-email-balbi@ti.com> X-Gm-Message-State: ALoCoQn6dMu2E9JrSUdbpUN39bWCfGxvKfUN02tuJPFbY2M49dmuZXpt4u0clwsAcn1WrD/rGVJL X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [74.125.149.240 listed in list.dnswl.org] 0.0 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Kevin Hilman , Tony Lindgren , Linux Kernel Mailing List , Felipe Balbi , Santosh Shilimkar , linux-serial@vger.kernel.org, Sourav Poddar , Linux OMAP Mailing List , Shubhrajyoti Datta , Linux ARM Kernel Mailing List X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org enable RX FIFO for 16 characters and TX FIFO for 16 spaces. Tested-by: Shubhrajyoti D Signed-off-by: Felipe Balbi --- drivers/tty/serial/omap-serial.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 0e5ffdf..137d475 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -55,8 +55,8 @@ #define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) /* FCR register bitmasks */ -#define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT 6 #define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) +#define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4) /* MVR register bitmasks */ #define OMAP_UART_MVR_SCHEME_SHIFT 30 @@ -820,9 +820,13 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; - /* Set receive FIFO threshold to 1 byte */ + /* Set receive FIFO threshold to 16 characters and + * transmit FIFO threshold to 16 spaces + */ up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; - up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT); + up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK; + up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 | + UART_FCR_ENABLE_FIFO; serial_out(up, UART_FCR, up->fcr); serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);