From patchwork Thu Aug 23 15:32:38 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: hachimi.samir@gmail.com X-Patchwork-Id: 1368061 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 79F51DF2AB for ; Thu, 23 Aug 2012 15:37:22 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T4ZQR-0008CX-AW; Thu, 23 Aug 2012 15:34:27 +0000 Received: from mail-wi0-f177.google.com ([209.85.212.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T4ZQJ-0008BB-Kj for linux-arm-kernel@lists.infradead.org; Thu, 23 Aug 2012 15:34:20 +0000 Received: by wibhn17 with SMTP id hn17so783592wib.0 for ; Thu, 23 Aug 2012 08:34:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=38EgiCUhRLjIX2cJEG0LG1vSG11wICBlZW6w8N05Mxg=; b=nmFpeJfDsewKYHu3vBY45U+QKWKXtiRNsB7sabSbq6dQ4z+J9GHmgmPr407cYHnxfs arOV9gcItzwlWVNNBjfaHgcW1BX4LFte5DDmOz03GGfAhC3EkbaXLPHOfe8juU4lknry OzTbUl6o93Fsce6V+1857qqGmL8yRmCgedySovHuvMKO36xj0rHqXC04QOzUX5FJUfI4 HcaqhUn1VaWng8XwtdL9OVDh/aeVEsbaw5sU1IWykMt+QkE2enZctRj7aN7dF2CTCTFx aOYEqIv9mVwx/JbJ6QjK2k8b/t5aAfN1Kn1R8zVEp+TwkR1eGHYPoOUK+AOKaCaoQjHJ yd0w== Received: by 10.180.98.138 with SMTP id ei10mr5053775wib.1.1345736057760; Thu, 23 Aug 2012 08:34:17 -0700 (PDT) Received: from localhost.localdomain ([213.144.218.64]) by mx.google.com with ESMTPS id cl8sm45359944wib.10.2012.08.23.08.34.17 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 23 Aug 2012 08:34:17 -0700 (PDT) From: hachimi.samir@gmail.com To: shawn.guo@linaro.org Subject: [PATCH 1/2] imx6q: Configure the pwm node for pinmux support Date: Thu, 23 Aug 2012 17:32:38 +0200 Message-Id: <1345735959-12964-2-git-send-email-hachimi.samir@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <[PATCH 0/2] imx6q: pwm: Activate stop_mode and remove auto enable after configuration> References: <[PATCH 0/2] imx6q: pwm: Activate stop_mode and remove auto enable after configuration> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.212.177 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (hachimi.samir[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Samir Hachimi , s.hauer@pengutronix.de, Samir Hachimi , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Samir Hachimi Add the pinmux support for pwm. Several pin can be set to PwmO for the same Pwm. This configuration set all of them when enabled. Signed-off-by: Samir Hachimi --- arch/arm/boot/dts/imx6q.dtsi | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 42 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index fd57079..c913b99 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -248,23 +248,35 @@ }; pwm@02080000 { /* PWM1 */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1_1>; reg = <0x02080000 0x4000>; interrupts = <0 83 0x04>; + status = "disabled"; }; pwm@02084000 { /* PWM2 */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2_1>; reg = <0x02084000 0x4000>; interrupts = <0 84 0x04>; + status = "disabled"; }; pwm@02088000 { /* PWM3 */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3_1>; reg = <0x02088000 0x4000>; interrupts = <0 85 0x04>; + status = "disabled"; }; pwm@0208c000 { /* PWM4 */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4_1>; reg = <0x0208c000 0x4000>; interrupts = <0 86 0x04>; + status = "disabled"; }; flexcan@02090000 { /* CAN1 */ @@ -559,6 +571,36 @@ }; }; + pwm1 { + pinctrl_pwm1_1: pwm1grp-1 { + fsl,pins = <1543 0x80000000 /* MX6Q_PAD_SD1_DAT3__PWM1_PWMO */ + 574 0x80000000 /* MX6Q_PAD_DISPO_DAT8__PWM1_PWMO */ + 971 0x80000000>; /* MX6Q_PAD_GPIO_9__PWM1_PWMO */ + }; + }; + + pwm2 { + pinctrl_pwm2_1: pwm2grp-1 { + fsl,pins = <1557 0x80000000 /* MX6Q_PAD_SD1_DAT2__PWM2_PWMO */ + 582 0x80000000 /* MX6Q_PAD_DISP0_DAT9__PWM2_PWMO */ + 963 0x80000000>; /* MX6Q_PAD_GPIO_1__PWM2_PWMO */ + }; + }; + + pwm3 { + pinctrl_pwm3_1: pwm3grp-1 { + fsl,pins = <1471 0x80000000 /* MX6Q_PAD_SD4_DAT1__PWM3_PWMO */ + 1526 0x80000000>; /* MX6Q_PAD_SD1_DAT1__PWM3_PWMO */ + }; + }; + + pwm4 { + pinctrl_pwm4_1: pwm4grp-1 { + fsl,pins = <1479 0x80000000 /* MX6Q_PAD_SD4_DAT2__PWM4_PWMO */ + 1550 0x80000000>; /* MX6Q_PAD_SD1_CMD__PWM4_PWMO */ + }; + }; + usdhc3 { pinctrl_usdhc3_1: usdhc3grp-1 { fsl,pins = <1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */