diff mbox

ARM: Exynos4: Turn off clocks for NAND, OneNAND and TSI controllers

Message ID 1345819936-6503-1-git-send-email-chander.kashyap@linaro.org (mailing list archive)
State New, archived
Headers show

Commit Message

Chander Kashyap Aug. 24, 2012, 2:52 p.m. UTC
The clocks for NAND, OneNAND and Transport Stream Interface(TSI)
controllers could be either enabled or disabled at boot. To ensure
that these are turned off until used, add them to the list of clocks
to be turned off during boot.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
---
 arch/arm/mach-exynos/clock-exynos4.c |   12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

Thomas Abraham Aug. 28, 2012, 8:15 a.m. UTC | #1
On 24 August 2012 20:22, Chander Kashyap <chander.kashyap@linaro.org> wrote:
> The clocks for NAND, OneNAND and Transport Stream Interface(TSI)
> controllers could be either enabled or disabled at boot. To ensure
> that these are turned off until used, add them to the list of clocks
> to be turned off during boot.
>
> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
> ---
>  arch/arm/mach-exynos/clock-exynos4.c |   12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
> index 2f51293..7cc5491 100644
> --- a/arch/arm/mach-exynos/clock-exynos4.c
> +++ b/arch/arm/mach-exynos/clock-exynos4.c
> @@ -501,6 +501,10 @@ static struct clk exynos4_init_clocks_off[] = {
>                 .enable         = exynos4_clk_ip_cam_ctrl,
>                 .ctrlbit        = (1 << 3),
>         }, {
> +               .name           = "tsi",
> +               .enable         = exynos4_clk_ip_fsys_ctrl,
> +               .ctrlbit        = (1 << 4),
> +       }, {
>                 .name           = "hsmmc",
>                 .devname        = "exynos4-sdhci.0",
>                 .parent         = &exynos4_clk_aclk_133.clk,
> @@ -530,6 +534,14 @@ static struct clk exynos4_init_clocks_off[] = {
>                 .enable         = exynos4_clk_ip_fsys_ctrl,
>                 .ctrlbit        = (1 << 9),
>         }, {
> +               .name           = "onenand",
> +               .enable         = exynos4_clk_ip_fsys_ctrl,
> +               .ctrlbit        = (1 << 15),
> +       }, {
> +               .name           = "nfcon",
> +               .enable         = exynos4_clk_ip_fsys_ctrl,
> +               .ctrlbit        = (1 << 16),
> +       }, {
>                 .name           = "dac",
>                 .devname        = "s5p-sdo",
>                 .enable         = exynos4_clk_ip_tv_ctrl,
> --
> 1.7.9.5

Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Kim Kukjin Aug. 28, 2012, 11:20 p.m. UTC | #2
On 08/28/12 01:15, Thomas Abraham wrote:
> On 24 August 2012 20:22, Chander Kashyap<chander.kashyap@linaro.org>  wrote:
>> The clocks for NAND, OneNAND and Transport Stream Interface(TSI)
>> controllers could be either enabled or disabled at boot. To ensure
>> that these are turned off until used, add them to the list of clocks
>> to be turned off during boot.
>>
>> Signed-off-by: Chander Kashyap<chander.kashyap@linaro.org>
>> ---
>>   arch/arm/mach-exynos/clock-exynos4.c |   12 ++++++++++++
>>   1 file changed, 12 insertions(+)
>>
>> diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
>> index 2f51293..7cc5491 100644
>> --- a/arch/arm/mach-exynos/clock-exynos4.c
>> +++ b/arch/arm/mach-exynos/clock-exynos4.c
>> @@ -501,6 +501,10 @@ static struct clk exynos4_init_clocks_off[] = {
>>                  .enable         = exynos4_clk_ip_cam_ctrl,
>>                  .ctrlbit        = (1<<  3),
>>          }, {
>> +               .name           = "tsi",
>> +               .enable         = exynos4_clk_ip_fsys_ctrl,
>> +               .ctrlbit        = (1<<  4),
>> +       }, {
>>                  .name           = "hsmmc",
>>                  .devname        = "exynos4-sdhci.0",
>>                  .parent         =&exynos4_clk_aclk_133.clk,
>> @@ -530,6 +534,14 @@ static struct clk exynos4_init_clocks_off[] = {
>>                  .enable         = exynos4_clk_ip_fsys_ctrl,
>>                  .ctrlbit        = (1<<  9),
>>          }, {
>> +               .name           = "onenand",
>> +               .enable         = exynos4_clk_ip_fsys_ctrl,
>> +               .ctrlbit        = (1<<  15),
>> +       }, {
>> +               .name           = "nfcon",
>> +               .enable         = exynos4_clk_ip_fsys_ctrl,
>> +               .ctrlbit        = (1<<  16),
>> +       }, {
>>                  .name           = "dac",
>>                  .devname        = "s5p-sdo",
>>                  .enable         = exynos4_clk_ip_tv_ctrl,
>> --
>> 1.7.9.5
>
> Reviewed-by: Thomas Abraham<thomas.abraham@linaro.org>

Applied, thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
diff mbox

Patch

diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index 2f51293..7cc5491 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -501,6 +501,10 @@  static struct clk exynos4_init_clocks_off[] = {
 		.enable		= exynos4_clk_ip_cam_ctrl,
 		.ctrlbit	= (1 << 3),
 	}, {
+		.name		= "tsi",
+		.enable		= exynos4_clk_ip_fsys_ctrl,
+		.ctrlbit	= (1 << 4),
+	}, {
 		.name		= "hsmmc",
 		.devname	= "exynos4-sdhci.0",
 		.parent		= &exynos4_clk_aclk_133.clk,
@@ -530,6 +534,14 @@  static struct clk exynos4_init_clocks_off[] = {
 		.enable		= exynos4_clk_ip_fsys_ctrl,
 		.ctrlbit	= (1 << 9),
 	}, {
+		.name		= "onenand",
+		.enable		= exynos4_clk_ip_fsys_ctrl,
+		.ctrlbit	= (1 << 15),
+	}, {
+		.name		= "nfcon",
+		.enable		= exynos4_clk_ip_fsys_ctrl,
+		.ctrlbit	= (1 << 16),
+	}, {
 		.name		= "dac",
 		.devname	= "s5p-sdo",
 		.enable		= exynos4_clk_ip_tv_ctrl,