From patchwork Wed Aug 29 01:14:55 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Park X-Patchwork-Id: 1383421 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 1D32CDF283 for ; Wed, 29 Aug 2012 01:23:00 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T6WsU-0001Ae-EJ; Wed, 29 Aug 2012 01:15:30 +0000 Received: from mailout1.samsung.com ([203.254.224.24]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T6WsI-00019l-Nh for linux-arm-kernel@lists.infradead.org; Wed, 29 Aug 2012 01:15:19 +0000 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M9H0082DST5EG60@mailout1.samsung.com> for linux-arm-kernel@lists.infradead.org; Wed, 29 Aug 2012 10:15:15 +0900 (KST) X-AuditID: cbfee61b-b7faf6d00000476a-e8-503d6d234593 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 1B.1C.18282.32D6D305; Wed, 29 Aug 2012 10:15:15 +0900 (KST) Received: from localhost.localdomain ([10.90.51.45]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M9H00IO5ST8BV20@mmp1.samsung.com> for linux-arm-kernel@lists.infradead.org; Wed, 29 Aug 2012 10:15:15 +0900 (KST) From: Chanho Park To: kgene.kim@samsung.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v3 2/4] ARM: EXYNOS: Correct combined IRQs for exynos4412 Date: Wed, 29 Aug 2012 10:14:55 +0900 Message-id: <1346202897-27306-3-git-send-email-chanho61.park@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1346202897-27306-1-git-send-email-chanho61.park@samsung.com> References: <1346202897-27306-1-git-send-email-chanho61.park@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrAJMWRmVeSWpSXmKPExsVy+t9jAV3lXNsAg1Ot3BabHl9jdWD02Lyk PoAxissmJTUnsyy1SN8ugStj1cspbAVbRCturHnJ0sC4XbCLkYNDQsBEYsM1/y5GTiBTTOLC vfVsXYxcHEICixglzkw7yQ7hrGWSuP9uPztIFZuArsSW568YQWwRgRSJKzf6GUGKmAV2M0q8 /zwJLCEs4Cmx8tU/sAYWAVWJhy1TmUFsXqB435+JzBCbFSTmTLIBMTkFvCRu77AFqRACqlj4 6wX7BEbeBYwMqxhFUwuSC4qT0nON9IoTc4tL89L1kvNzNzGC/f1MegfjqgaLQ4wCHIxKPLwX uG0DhFgTy4orcw8xSnAwK4nwPjUFCvGmJFZWpRblxxeV5qQWH2KU5mBREufl7zMMEBJITyxJ zU5NLUgtgskycXBKNTC2dTOoq1gs/8t40ZbjTGVNGc/cAk/xw2liiy3yzaavbRTbIHWwK8uJ J7CRXaHK8bAw0+q/s9oE965dIeFw+mXM2UtpO/su7/xj9s5dz3Fv+ZQJjnUrkkoe9WYfd7Dx EFVPmeR27GKrcEF10d0XdgmP09piCtd/PsX0LXqhzsR1P3JCt1XI/FNiKc5INNRiLipOBACP QatN8wEAAA== X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.1 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.24 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.2 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux@arm.linux.org.uk, sachin.kamat@linaro.org, will.deacon@arm.com, Kyungmin Park , thomas.abraham@linaro.org, Chanho Park X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch corrects combined IRQs for exynos4412 platform. The exynos4412 has four extra combined irq group. Each irq is mapped to IRQ_SPI(xx). Unfortunately, extra combined IRQs isn't sequential. So, we need to map the irq manually. Signed-off-by: Chanho Park Signed-off-by: Kyungmin Park --- arch/arm/mach-exynos/common.c | 31 ++++++++++++++++++++++++------ arch/arm/mach-exynos/include/mach/irqs.h | 2 +- 2 files changed, 26 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index f194bbc..be61564 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -560,23 +560,39 @@ static struct irq_domain_ops combiner_irq_domain_ops = { .map = combiner_irq_domain_map, }; +static unsigned int get_combiner_extra_irq(int group) +{ + switch (group) { + case 16: + return IRQ_SPI(107); + case 17: + return IRQ_SPI(108); + case 18: + return IRQ_SPI(48); + case 19: + return IRQ_SPI(42); + default: + return 0; + } +} + static void __init combiner_init(void __iomem *combiner_base, struct device_node *np) { int i, irq, irq_base; unsigned int max_nr, nr_irq; + max_nr = soc_is_exynos5250() ? EXYNOS5_MAX_COMBINER_NR : + EXYNOS4_MAX_COMBINER_NR; + if (np) { if (of_property_read_u32(np, "samsung,combiner-nr", &max_nr)) { pr_warning("%s: number of combiners not specified, " "setting default as %d.\n", - __func__, EXYNOS4_MAX_COMBINER_NR); - max_nr = EXYNOS4_MAX_COMBINER_NR; + __func__, max_nr); } - } else { - max_nr = soc_is_exynos5250() ? EXYNOS5_MAX_COMBINER_NR : - EXYNOS4_MAX_COMBINER_NR; } + nr_irq = max_nr * MAX_IRQ_IN_COMBINER; irq_base = irq_alloc_descs(COMBINER_IRQ(0, 0), 1, nr_irq, 0); @@ -593,7 +609,10 @@ static void __init combiner_init(void __iomem *combiner_base, } for (i = 0; i < max_nr; i++) { - irq = IRQ_SPI(i); + if (i < 16 || soc_is_exynos5250()) + irq = IRQ_SPI(i); + else + irq = get_combiner_extra_irq(i); #ifdef CONFIG_OF if (np) irq = irq_of_parse_and_map(np, i); diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 35bced6..357ed7f 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h @@ -165,7 +165,7 @@ #define EXYNOS4_IRQ_FIMD0_VSYNC COMBINER_IRQ(11, 1) #define EXYNOS4_IRQ_FIMD0_SYSTEM COMBINER_IRQ(11, 2) -#define EXYNOS4_MAX_COMBINER_NR 16 +#define EXYNOS4_MAX_COMBINER_NR 20 #define EXYNOS4_IRQ_GPIO1_NR_GROUPS 16 #define EXYNOS4_IRQ_GPIO2_NR_GROUPS 9