From patchwork Wed Aug 29 04:46:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tushar Behera X-Patchwork-Id: 1383631 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 657A8DFFCF for ; Wed, 29 Aug 2012 04:52:57 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T6aDD-0006Su-V8; Wed, 29 Aug 2012 04:49:08 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T6aD1-0006S2-PC for linux-arm-kernel@lists.infradead.org; Wed, 29 Aug 2012 04:48:57 +0000 Received: by pbbrq8 with SMTP id rq8so451853pbb.36 for ; Tue, 28 Aug 2012 21:48:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=pvGirI91c0vU3kttwKCStBTY+WHwYp0s0LVnUjQx/Sg=; b=XvzuftGhMkFiBznL3x4NoOx3V/UydJKTz5BtD0WIZ+rxY2fhdIfrzAY4br4ht6w6yT i9iyQKip+Xv/WS45tnLbgHx9ry0+ARSdoBdrWz6eX58BtuTknoVCmb/RAhjekkWiooUC tJs0j+41XJPUU5B164iOxN0Yg0CWetkun6woRDbh/YRA+r4dndW+kAZCNdidE2OfrH6g RkewmrBll8aBWuhvwwj74ZTQ19GaFh5VketU3MXknz2Zyexu1X5KJGLfUUESmvuyu/WT vgoSGuF1QDGZscm9VXHJZGaQad0lGLqukp4M7LN/oucoBuAeq4uvGqV8/xA6Qo/UEs82 kueg== Received: by 10.68.228.1 with SMTP id se1mr1658390pbc.110.1346215734337; Tue, 28 Aug 2012 21:48:54 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id hr1sm18511018pbc.23.2012.08.28.21.48.51 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 28 Aug 2012 21:48:53 -0700 (PDT) From: Tushar Behera To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] ARM: EXYNOS: Set the capability of pdm0 and pdm1 as DMA_PRIVATE Date: Wed, 29 Aug 2012 10:16:24 +0530 Message-Id: <1346215585-31023-2-git-send-email-tushar.behera@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1346215585-31023-1-git-send-email-tushar.behera@linaro.org> References: <1346215585-31023-1-git-send-email-tushar.behera@linaro.org> X-Gm-Message-State: ALoCoQkTejtFuP/BZJymFdAzAz35f7ABxIQtUtulentg+UuOO9WMG0s+UUuRXeeluDghPJJx0g9U X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: vinod.koul@intel.com, jaswinder.singh@linaro.org, kgene.kim@samsung.com, patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DMA clients pdma0 and pdma1 are internal to the SoC and are used only by dedicated peripherals. Since they cannot be used for generic purpose, their capability should be set as DMA_PRIVATE. CC: Kukjin Kim Signed-off-by: Tushar Behera --- arch/arm/mach-exynos/dma.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c index f60b66d..21d568b 100644 --- a/arch/arm/mach-exynos/dma.c +++ b/arch/arm/mach-exynos/dma.c @@ -303,10 +303,12 @@ static int __init exynos_dma_init(void) dma_cap_set(DMA_SLAVE, exynos_pdma0_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, exynos_pdma0_pdata.cap_mask); + dma_cap_set(DMA_PRIVATE, exynos_pdma0_pdata.cap_mask); amba_device_register(&exynos_pdma0_device, &iomem_resource); dma_cap_set(DMA_SLAVE, exynos_pdma1_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, exynos_pdma1_pdata.cap_mask); + dma_cap_set(DMA_PRIVATE, exynos_pdma1_pdata.cap_mask); amba_device_register(&exynos_pdma1_device, &iomem_resource); dma_cap_set(DMA_MEMCPY, exynos_mdma1_pdata.cap_mask);