From patchwork Wed Aug 29 13:31:07 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1385011 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 468CC3FC71 for ; Wed, 29 Aug 2012 13:36:14 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T6iOR-00066M-6E; Wed, 29 Aug 2012 13:33:15 +0000 Received: from na3sys009aog109.obsmtp.com ([74.125.149.201]) by merlin.infradead.org with smtps (Exim 4.76 #1 (Red Hat Linux)) id 1T6iMe-0005TJ-Lw for linux-arm-kernel@lists.infradead.org; Wed, 29 Aug 2012 13:31:26 +0000 Received: from mail-ob0-f177.google.com ([209.85.214.177]) (using TLSv1) by na3sys009aob109.postini.com ([74.125.148.12]) with SMTP ID DSNKUD4Zqzq8iBip+ZaR5nl3f1F2/DXTPPG2@postini.com; Wed, 29 Aug 2012 06:31:24 PDT Received: by obbta17 with SMTP id ta17so986166obb.36 for ; Wed, 29 Aug 2012 06:31:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=v/n7A/0gToee2XyZTKZ/OMbD3JIBOIFPHQlv2L1sxRs=; b=d1Y5z+bbj0BYucFGfkhtr6UVkSukAvmOPJZc0bQQKtHI9+/MVzGzZpMft+PyThYD7/ 8aCtblKH3voiRgOO8wuWUNeWXNb/Z6UuC1tZfaWR0kQShtlDeazhd+bsUn9xjatQ9iYP reOgMzSy3ndiraGuaO1OhgIIwSlLy/u5qI60j5SyQ8oh4Cq3Q6iEqGDtjCNa/g6fJGzc tnyUXH0vz7rtVBNVAewYvhBaTI/KcPPH6yItq6qVjHQzfNp/FDwSssowVvQ87vF+zV9f KfIJsux7n8X16RQzorR7lEO3zmLpAEzf7hYRTCaOEztfVoLUeHHcXxYIBOlG+ptD5xQL pa8A== Received: by 10.60.171.69 with SMTP id as5mr1190513oec.100.1346247082798; Wed, 29 Aug 2012 06:31:22 -0700 (PDT) Received: from barack.emea.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id bp7sm22491641obc.12.2012.08.29.06.31.20 (version=SSLv3 cipher=OTHER); Wed, 29 Aug 2012 06:31:22 -0700 (PDT) From: Peter Ujfalusi To: Tony Lindgren Subject: [PATCH v2 8/8] ARM/dts: omap5: Add McPDM and DMIC section to the dtsi file Date: Wed, 29 Aug 2012 16:31:07 +0300 Message-Id: <1346247067-9632-9-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.7.8.6 In-Reply-To: <1346247067-9632-1-git-send-email-peter.ujfalusi@ti.com> References: <1346247067-9632-1-git-send-email-peter.ujfalusi@ti.com> X-Gm-Message-State: ALoCoQk0Q9smtiURYV6VpDDmetFSQfUAhWw6nA1I8a+u6a0lktPICs6HmAoyRqVI8TWV4Jw+WQID X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [74.125.149.201 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: devicetree-discuss@lists.ozlabs.org, linux-omap@vger.kernel.org, Benoit Cousson , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org To be able to load the McPDM and DMIC driver when booted with device tree. Signed-off-by: Peter Ujfalusi --- arch/arm/boot/dts/omap5.dtsi | 20 ++++++++++++++++++++ 1 files changed, 20 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 57ca7c1..5ab1a36 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -212,6 +212,26 @@ ti,needs-special-reset; }; + mcpdm: mcpdm@40132000 { + compatible = "ti,omap4-mcpdm"; + reg = <0x40132000 0x7f>, /* MPU private access */ + <0x49032000 0x7f>; /* L3 Interconnect */ + reg-names = "mpu", "dma"; + interrupts = <0 112 0x4>; + interrupt-parent = <&gic>; + ti,hwmods = "mcpdm"; + }; + + dmic: dmic@4012e000 { + compatible = "ti,omap4-dmic"; + reg = <0x4012e000 0x7f>, /* MPU private access */ + <0x4902e000 0x7f>; /* L3 Interconnect */ + reg-names = "mpu", "dma"; + interrupts = <0 114 0x4>; + interrupt-parent = <&gic>; + ti,hwmods = "dmic"; + }; + mcbsp1: mcbsp@40122000 { compatible = "ti,omap4-mcbsp"; reg = <0x40122000 0xff>, /* MPU private access */