From patchwork Fri Aug 31 11:47:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthieu Castet X-Patchwork-Id: 1392961 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id D759FE0000 for ; Fri, 31 Aug 2012 11:50:11 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T7PhK-0001mM-Jo; Fri, 31 Aug 2012 11:47:38 +0000 Received: from mail-ey0-f177.google.com ([209.85.215.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T7PhG-0001lU-VP for linux-arm-kernel@lists.infradead.org; Fri, 31 Aug 2012 11:47:35 +0000 Received: by eaai12 with SMTP id i12so834603eaa.36 for ; Fri, 31 Aug 2012 04:47:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer; bh=XRlTZ3/e2458fA+zDGkuwBhNIWRwQqj6NZaVrX3mrPw=; b=ne2rqNr5hBMMxubPvrg9GOxHNbmniIx7kk2NIh+5aM4zBygsmCVqqL9jo2WQmybv0Z Fa+Ya1SihFT48ASXBezCx7sg6sLLRXUgRnS9L8Mjulbgcnw5MU6GBHBJJlta7ul1zJCv M4oP9cIEtVvvMllwGrrTbWDmgfuAuLgqZUxLB/qy1Nc6oAwlvAyiRXHNbZ/AO+SjOuyt s9vitAE0HDX5DGixDmE7jz4UCUfv4qR5IYUtKnuxPwmQt88L1ZvHTqusRZKUGExJcuIn TWe1z8jKnOZJtTeIwaQhGSeNW/kNqxsSelAV2O1tEF9C4yT/oO7VIaiEoblUP0/pXHTt 0z/w== Received: by 10.14.4.201 with SMTP id 49mr10816026eej.0.1346413651593; Fri, 31 Aug 2012 04:47:31 -0700 (PDT) Received: from perruche.Parrot.Biz ([46.218.109.82]) by mx.google.com with ESMTPS id 45sm12801543eeb.8.2012.08.31.04.47.30 (version=SSLv3 cipher=OTHER); Fri, 31 Aug 2012 04:47:31 -0700 (PDT) From: Matthieu CASTET To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, gregkh@linuxfoundation.org Subject: [PATCH v2] hvc_dcc : add support to armv4 and armv5 core Date: Fri, 31 Aug 2012 13:47:25 +0200 Message-Id: <1346413645-4593-1-git-send-email-castet.matthieu@free.fr> X-Mailer: git-send-email 1.7.10.4 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.215.177 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (castet.matthieu[at]free.fr) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Matthieu Castet , Matthieu CASTET , sboyd@codeaurora.org, alan@lxorguk.ukuu.org.uk, arnd@arndb.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Signed-off-by: Matthieu Castet --- drivers/tty/hvc/hvc_dcc.c | 83 +++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 76 insertions(+), 7 deletions(-) diff --git a/drivers/tty/hvc/hvc_dcc.c b/drivers/tty/hvc/hvc_dcc.c index 44fbeba..5f8827f 100644 --- a/drivers/tty/hvc/hvc_dcc.c +++ b/drivers/tty/hvc/hvc_dcc.c @@ -27,10 +27,10 @@ #include "hvc_console.h" /* DCC Status Bits */ -#define DCC_STATUS_RX (1 << 30) -#define DCC_STATUS_TX (1 << 29) +#define DCC_STATUS_RX_V6 (1 << 30) +#define DCC_STATUS_TX_V6 (1 << 29) -static inline u32 __dcc_getstatus(void) +static inline u32 __dcc_getstatus_v6(void) { u32 __ret; asm volatile("mrc p14, 0, %0, c0, c1, 0 @ read comms ctrl reg" @@ -40,7 +40,7 @@ static inline u32 __dcc_getstatus(void) } -static inline char __dcc_getchar(void) +static inline char __dcc_getchar_v6(void) { char __c; @@ -51,7 +51,7 @@ static inline char __dcc_getchar(void) return __c; } -static inline void __dcc_putchar(char c) +static inline void __dcc_putchar_v6(char c) { asm volatile("mcr p14, 0, %0, c0, c5, 0 @ write a char" : /* no output register */ @@ -59,6 +59,69 @@ static inline void __dcc_putchar(char c) isb(); } +static int hvc_dcc_put_chars_v6(uint32_t vt, const char *buf, int count) +{ + int i; + + for (i = 0; i < count; i++) { + while (__dcc_getstatus_v6() & DCC_STATUS_TX_V6) + cpu_relax(); + + __dcc_putchar_v6(buf[i]); + } + + return count; +} + +static int hvc_dcc_get_chars_v6(uint32_t vt, char *buf, int count) +{ + int i; + + for (i = 0; i < count; ++i) + if (__dcc_getstatus_v6() & DCC_STATUS_RX_V6) + buf[i] = __dcc_getchar_v6(); + else + break; + + return i; +} + +static const struct hv_ops hvc_dcc_get_put_ops_v6 = { + .get_chars = hvc_dcc_get_chars_v6, + .put_chars = hvc_dcc_put_chars_v6, +}; + +#define DCC_STATUS_RX (1 << 0) +#define DCC_STATUS_TX (1 << 1) + +/* primitive JTAG1 protocol utilities */ +static inline u32 __dcc_getstatus(void) +{ + u32 ret; + + asm __volatile__ ("mrc p14, 0, %0, c0, c0 @ read comms ctrl reg" + : "=r" (ret)); + + return ret; +} + +static inline char __dcc_getchar(void) +{ + char c; + + asm __volatile__ ("mrc p14, 0, %0, c1, c0 @ read comms data reg" + : "=r" (c)); + + return c; +} + +static inline void __dcc_putchar(unsigned char c) +{ + asm __volatile__ ("mcr p14, 0, %0, c1, c0 @ write a char" + : /* no output register */ + : "r" (c)); +} + static int hvc_dcc_put_chars(uint32_t vt, const char *buf, int count) { int i; @@ -93,14 +156,20 @@ static const struct hv_ops hvc_dcc_get_put_ops = { static int __init hvc_dcc_console_init(void) { - hvc_instantiate(0, 0, &hvc_dcc_get_put_ops); + if (cpu_architecture() >= CPU_ARCH_ARMv6) + hvc_instantiate(0, 0, &hvc_dcc_get_put_ops_v6); + else + hvc_instantiate(0, 0, &hvc_dcc_get_put_ops); return 0; } console_initcall(hvc_dcc_console_init); static int __init hvc_dcc_init(void) { - hvc_alloc(0, 0, &hvc_dcc_get_put_ops, 128); + if (cpu_architecture() >= CPU_ARCH_ARMv6) + hvc_alloc(0, 0, &hvc_dcc_get_put_ops_v6, 128); + else + hvc_alloc(0, 0, &hvc_dcc_get_put_ops, 128); return 0; } device_initcall(hvc_dcc_init);