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[62.78.217.178]) by mx.google.com with ESMTPS id u5sm564827lbg.8.2012.09.06.05.51.09 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 06 Sep 2012 05:51:10 -0700 (PDT) From: Felipe Balbi To: Greg KH Subject: [PATCH v4 20/21] serial: omap: move uart_omap_port definition to C file Date: Thu, 6 Sep 2012 15:45:39 +0300 Message-Id: <1346935540-1792-21-git-send-email-balbi@ti.com> X-Mailer: git-send-email 1.7.12.rc3 In-Reply-To: <1346935540-1792-1-git-send-email-balbi@ti.com> References: <20120906122948.GC29202@arwen.pp.htv.fi> <1346935540-1792-1-git-send-email-balbi@ti.com> X-Gm-Message-State: ALoCoQkl0L+Yl4x43T/LklchGnLv68qCjwC0JL9xvlxexOjfU6WzL8kNxivv56TV1qYah5KJMwAU X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [74.125.149.76 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Kevin Hilman , Tony Lindgren , Linux Kernel Mailing List , Felipe Balbi , Santosh Shilimkar , linux-serial@vger.kernel.org, Sourav Poddar , Linux OMAP Mailing List , Shubhrajyoti Datta , Linux ARM Kernel Mailing List , alan@linux.intel.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org nobody needs to access the uart_omap_port structure other than omap-serial.c file. Let's move that structure definition to the C source file in order to prevent anyone from accessing our structure. Tested-by: Shubhrajyoti D Acked-by: Tony Lindgren Signed-off-by: Felipe Balbi --- arch/arm/plat-omap/include/plat/omap-serial.h | 37 -------------------------- drivers/tty/serial/omap-serial.c | 38 +++++++++++++++++++++++++++ 2 files changed, 38 insertions(+), 37 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h index a79ed8b..3c9fd3e 100644 --- a/arch/arm/plat-omap/include/plat/omap-serial.h +++ b/arch/arm/plat-omap/include/plat/omap-serial.h @@ -105,45 +105,8 @@ struct uart_omap_dma { unsigned int rx_timeout; }; -struct uart_omap_port { - struct uart_port port; - struct uart_omap_dma uart_dma; - struct device *dev; - - unsigned char ier; - unsigned char lcr; - unsigned char mcr; - unsigned char fcr; - unsigned char efr; - unsigned char dll; - unsigned char dlh; - unsigned char mdr1; - unsigned char scr; - - int use_dma; - /* - * Some bits in registers are cleared on a read, so they must - * be saved whenever the register is read but the bits will not - * be immediately processed. - */ - unsigned int lsr_break_flag; - unsigned char msr_saved_flags; - char name[20]; - unsigned long port_activity; - u32 context_loss_cnt; - u32 errata; - u8 wakeups_enabled; int DTR_gpio; int DTR_inverted; int DTR_active; - - struct pm_qos_request pm_qos_request; - u32 latency; - u32 calc_latency; - struct work_struct qos_work; -}; - -#define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port))) - #endif /* __OMAP_SERIAL_H__ */ diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 881b652..164c3c9 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -70,6 +70,44 @@ #define OMAP_UART_MVR_MAJ_SHIFT 8 #define OMAP_UART_MVR_MIN_MASK 0x3f +struct uart_omap_port { + struct uart_port port; + struct uart_omap_dma uart_dma; + struct device *dev; + + unsigned char ier; + unsigned char lcr; + unsigned char mcr; + unsigned char fcr; + unsigned char efr; + unsigned char dll; + unsigned char dlh; + unsigned char mdr1; + unsigned char scr; + + int use_dma; + /* + * Some bits in registers are cleared on a read, so they must + * be saved whenever the register is read but the bits will not + * be immediately processed. + */ + unsigned int lsr_break_flag; + unsigned char msr_saved_flags; + char name[20]; + unsigned long port_activity; + u32 context_loss_cnt; + u32 errata; + u8 wakeups_enabled; + unsigned int irq_pending:1; + + struct pm_qos_request pm_qos_request; + u32 latency; + u32 calc_latency; + struct work_struct qos_work; +}; + +#define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port))) + static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; /* Forward declaration of functions */