From patchwork Thu Sep 6 13:06:18 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 1414951 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 932D73FC71 for ; Thu, 6 Sep 2012 13:12:44 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T9bo6-0007eI-Dq; Thu, 06 Sep 2012 13:07:43 +0000 Received: from na3sys009aog117.obsmtp.com ([74.125.149.242]) by merlin.infradead.org with smtps (Exim 4.76 #1 (Red Hat Linux)) id 1T9bmc-0006UT-Qm for linux-arm-kernel@lists.infradead.org; Thu, 06 Sep 2012 13:06:12 +0000 Received: from mail-ob0-f177.google.com ([209.85.214.177]) (using TLSv1) by na3sys009aob117.postini.com ([74.125.148.12]) with SMTP ID DSNKUEifwFTqx5WQZtwmch8/SvYRgP0dg6Rl@postini.com; Thu, 06 Sep 2012 06:06:10 PDT Received: by obbta17 with SMTP id ta17so2424201obb.36 for ; Thu, 06 Sep 2012 06:06:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=WVz8a8I1nsqYo/NAKKEbx79qIMEJ0MeInNDd4dni7vs=; b=g+PB1imtUH/yWm4YTLjVxMX1O8LWooaylkxUDMo6JGQHhR3d88a5I7qLZswBtvR5Xx 2yXAgVdHn6aZ4rplSEqL6jqsXPEnzfiyvqOwqRLtEvdKAmAnRGUhvZHS0AvEKXMZetzk XvwSFMHvC4oG32mUm7GKDy4UmzQoGTom+T8ab+PrVHiWwmyW4MTMjqDRUQZgLqWVuNmo /3Qmh1qZwb0YcWoiuSBjQUbwqaKTtTjI61Tgw7ZufgpZ4d/6z8ceuSNS8BkZN2H8GsdA iZe0YeRxWTzA4V5tISNRj/mMDdMrVlnqXYPKElrNPln/BCKPz1H8lTaAazK4J7e7hWxP 0+OA== Received: by 10.60.5.194 with SMTP id u2mr1873125oeu.24.1346936766016; Thu, 06 Sep 2012 06:06:06 -0700 (PDT) Received: from barack.emea.dhcp.ti.com (dragon.ti.com. [192.94.94.33]) by mx.google.com with ESMTPS id g8sm1903772obz.16.2012.09.06.06.06.04 (version=SSLv3 cipher=OTHER); Thu, 06 Sep 2012 06:06:05 -0700 (PDT) From: Peter Ujfalusi To: Tony Lindgren , Benoit Cousson Subject: [PATCH 2/2] ARM/dts: omap4-panda: Enable GPO functionality for twl6040 Date: Thu, 6 Sep 2012 16:06:18 +0300 Message-Id: <1346936778-18303-3-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.7.12 In-Reply-To: <1346936778-18303-1-git-send-email-peter.ujfalusi@ti.com> References: <1346936778-18303-1-git-send-email-peter.ujfalusi@ti.com> X-Gm-Message-State: ALoCoQn/9RyL/a/WjqxGFzzAg2JIYoSM5tsWVaHaMakoYvHzrp847nxVBgQmmwjg+LsnD5I0fF1T X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [74.125.149.242 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: devicetree-discuss@lists.ozlabs.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add the needed properties for twl6040 so the GPO functionality can be used by other drivers. Signed-off-by: Peter Ujfalusi --- arch/arm/boot/dts/omap4-panda.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts index d28cdc4..ed5ebdd 100644 --- a/arch/arm/boot/dts/omap4-panda.dts +++ b/arch/arm/boot/dts/omap4-panda.dts @@ -71,6 +71,9 @@ twl6040: twl@4b { compatible = "ti,twl6040"; + gpio-controller; + #gpio-cells = <1>; + reg = <0x4b>; /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */