From patchwork Fri Sep 7 05:35:39 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Ungerer X-Patchwork-Id: 1419601 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id B7E243FC85 for ; Fri, 7 Sep 2012 05:36:16 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T9rCH-0008Ni-AR; Fri, 07 Sep 2012 05:33:41 +0000 Received: from dnvwsmailout1.mcafee.com ([161.69.31.173]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T9rCB-0008MB-Lb for linux-arm-kernel@lists.infradead.org; Fri, 07 Sep 2012 05:33:36 +0000 Received: from SNCEXHT1.corp.nai.org (unknown [10.68.5.51]) by DNVWSMAILOUT1.mcafee.com with smtp id 23b2_064a_ef7df7bc_3213_408b_870d_96726a69681e; Fri, 07 Sep 2012 00:33:34 -0500 Received: from SNCEXAMMB3.corp.nai.org (10.68.48.8) by SNCEXHT1.corp.nai.org (10.68.5.51) with Microsoft SMTP Server (TLS) id 8.3.279.1; Thu, 6 Sep 2012 22:32:35 -0700 Received: from localhost.localdomain (172.22.196.22) by mail.na.nai.com (10.68.48.8) with Microsoft SMTP Server id 8.3.279.1; Thu, 6 Sep 2012 22:32:34 -0700 From: To: Subject: [PATCH] ARM: ks8695: add board support for the OpenGear boards based on the KS8695 Date: Fri, 7 Sep 2012 15:35:39 +1000 Message-ID: <1346996139-5692-1-git-send-email-gerg@snapgear.com> X-Mailer: git-send-email 1.5.5.1 MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [161.69.31.173 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Greg Ungerer X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Greg Ungerer A number of boards produced by OpenGear and based on the Micrel KS8695 SoC. Add board support to the KS8695 kernel code to support them. The following machine type entries will need to be added back into the mach-types file with these in mainline: cm4008 MACH_CM4008 CM4008 624 cm41xx MACH_CM41XX CM41XX 672 cm4002 MACH_CM4002 CM4002 876 im42xx MACH_IM42XX IM42XX 1105 im4004 MACH_IM4004 IM4004 1400 Signed-off-by: Greg Ungerer --- arch/arm/mach-ks8695/Kconfig | 39 ++++++++ arch/arm/mach-ks8695/Makefile | 5 + arch/arm/mach-ks8695/board-og.c | 199 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 243 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-ks8695/board-og.c diff --git a/arch/arm/mach-ks8695/Kconfig b/arch/arm/mach-ks8695/Kconfig index f6b737e..a545976 100644 --- a/arch/arm/mach-ks8695/Kconfig +++ b/arch/arm/mach-ks8695/Kconfig @@ -43,6 +43,45 @@ config MACH_SE4200 Internet Router. See http://www.securecomputing.com for more details. +config MACH_CM4002 + bool "OpenGear CM4002" + help + Say 'Y' here if you want your kernel to support the OpenGear + CM4002 Secure Access Server. See http://www.opengear.com for + more details. + +config MACH_CM4008 + bool "OpenGear CM4008" + select MIGHT_HAVE_PCI + help + Say 'Y' here if you want your kernel to support the OpenGear + CM4008 Console Server. See http://www.opengear.com for more + details. + +config MACH_CM41xx + bool "OpenGear CM41xx" + select MIGHT_HAVE_PCI + help + Say 'Y' here if you want your kernel to support the OpenGear + CM4016 or CM4048 Console Servers. See http://www.opengear.com for + more details. + +config MACH_IM4004 + bool "OpenGear IM4004" + select MIGHT_HAVE_PCI + help + Say 'Y' here if you want your kernel to support the OpenGear + IM4004 Secure Access Server. See http://www.opengear.com for + more details. + +config MACH_IM42xx + bool "OpenGear IM42xx" + select MIGHT_HAVE_PCI + help + Say 'Y' here if you want your kernel to support the OpenGear + IM4216 or IM4248 Console Servers. See http://www.opengear.com for + more details. + endmenu endif diff --git a/arch/arm/mach-ks8695/Makefile b/arch/arm/mach-ks8695/Makefile index 9673c0c..50980e6 100644 --- a/arch/arm/mach-ks8695/Makefile +++ b/arch/arm/mach-ks8695/Makefile @@ -21,3 +21,8 @@ obj-$(CONFIG_MACH_ACS5K) += board-acs5k.o obj-$(CONFIG_MACH_LITE300) += board-sg.o obj-$(CONFIG_MACH_SG310) += board-sg.o obj-$(CONFIG_MACH_SE4200) += board-sg.o +obj-$(CONFIG_MACH_CM4002) += board-og.o +obj-$(CONFIG_MACH_CM4008) += board-og.o +obj-$(CONFIG_MACH_CM41xx) += board-og.o +obj-$(CONFIG_MACH_IM4004) += board-og.o +obj-$(CONFIG_MACH_IM42xx) += board-og.o diff --git a/arch/arm/mach-ks8695/board-og.c b/arch/arm/mach-ks8695/board-og.c new file mode 100644 index 0000000..1623ba4 --- /dev/null +++ b/arch/arm/mach-ks8695/board-og.c @@ -0,0 +1,199 @@ +/* + * board-og.c -- support for the OpenGear KS8695 based boards. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "generic.h" + +static int og_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) +{ + if (machine_is_im4004() && (slot == 8)) + return KS8695_IRQ_EXTERN1; + return KS8695_IRQ_EXTERN0; +} + +static struct ks8695_pci_cfg __initdata og_pci = { + .mode = KS8695_MODE_PCI, + .map_irq = og_pci_map_irq, +}; + +static void __init og_register_pci(void) +{ + /* Initialize the GPIO lines for interrupt mode */ + ks8695_gpio_interrupt(KS8695_GPIO_0, IRQ_TYPE_LEVEL_LOW); + + /* Cardbus Slot */ + if (machine_is_im4004()) + ks8695_gpio_interrupt(KS8695_GPIO_1, IRQ_TYPE_LEVEL_LOW); + + ks8695_init_pci(&og_pci); +} + +/* + * The PCI bus reset is driven by a dedicated GPIO line. Toggle it here + * and bring the PCI bus out of reset. + */ +static void __init og_pci_bus_reset(void) +{ + unsigned int rstline = 1; + + /* Some boards use a different GPIO as the PCI reset line */ + if (machine_is_im4004()) + rstline = 2; + else if (machine_is_im42xx()) + rstline = 0; + + gpio_request(rstline, "PCI reset"); + gpio_direction_output(rstline, 0); + + /* Drive a reset on the PCI reset line */ + gpio_set_value(rstline, 1); + gpio_set_value(rstline, 0); + mdelay(100); + gpio_set_value(rstline, 1); + mdelay(100); +} + +/* + * Direct connect serial ports (non-PCI that is). + */ +#define S8250_PHYS 0x03800000 +#define S8250_VIRT 0xf4000000 +#define S8250_SIZE 0x00100000 + +static struct __initdata map_desc og_io_desc[] = { + { + .virtual = S8250_VIRT, + .pfn = __phys_to_pfn(S8250_PHYS), + .length = S8250_SIZE, + .type = MT_DEVICE, + } +}; + +static struct resource og_uart_resources[] = { + { + .start = S8250_VIRT, + .end = S8250_VIRT + S8250_SIZE, + .flags = IORESOURCE_MEM + }, +}; + +static struct plat_serial8250_port og_uart_data[] = { + { + .mapbase = S8250_VIRT, + .membase = (char *) S8250_VIRT, + .irq = 3, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = 115200 * 16, + }, + { }, +}; + +static struct platform_device og_uart = { + .name = "serial8250", + .id = 0, + .dev.platform_data = og_uart_data, + .num_resources = 1, + .resource = og_uart_resources +}; + +static struct platform_device *og_devices[] __initdata = { + &og_uart +}; + +static void __init og_init(void) +{ + ks8695_register_gpios(); + + if (machine_is_cm4002()) { + ks8695_gpio_interrupt(KS8695_GPIO_1, IRQ_TYPE_LEVEL_HIGH); + iotable_init(og_io_desc, ARRAY_SIZE(og_io_desc)); + platform_add_devices(og_devices, ARRAY_SIZE(og_devices)); + } else { + og_pci_bus_reset(); + og_register_pci(); + } + + ks8695_add_device_lan(); + ks8695_add_device_wan(); +} + +#ifdef CONFIG_MACH_CM4002 +MACHINE_START(CM4002, "OpenGear/CM4002") + /* OpenGear Inc. */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = og_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_CM4008 +MACHINE_START(CM4008, "OpenGear/CM4008") + /* OpenGear Inc. */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = og_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_CM41xx +MACHINE_START(CM41XX, "OpenGear/CM41xx") + /* OpenGear Inc. */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = og_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_IM4004 +MACHINE_START(IM4004, "OpenGear/IM4004") + /* OpenGear Inc. */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = og_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif + +#ifdef CONFIG_MACH_IM42xx +MACHINE_START(IM42XX, "OpenGear/IM42xx") + /* OpenGear Inc. */ + .atag_offset = 0x100, + .map_io = ks8695_map_io, + .init_irq = ks8695_init_irq, + .init_machine = og_init, + .timer = &ks8695_timer, + .restart = ks8695_restart, +MACHINE_END +#endif