From patchwork Fri Sep 7 05:40:00 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Ungerer X-Patchwork-Id: 1419621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 36BAA3FC85 for ; Fri, 7 Sep 2012 05:40:47 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T9rGi-0000zm-Vn; Fri, 07 Sep 2012 05:38:17 +0000 Received: from dnvwsmailout1.mcafee.com ([161.69.31.173]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T9rGg-0000zJ-BF for linux-arm-kernel@lists.infradead.org; Fri, 07 Sep 2012 05:38:14 +0000 Received: from SNCEXHT2.corp.nai.org (unknown [10.68.5.52]) by DNVWSMAILOUT1.mcafee.com with smtp id 239b_0570_911c6c47_394a_4f41_9f14_04533e425c65; Fri, 07 Sep 2012 00:38:12 -0500 Received: from SNCEXAMMB3.corp.nai.org (10.68.48.8) by SNCEXHT2.corp.nai.org (10.68.5.52) with Microsoft SMTP Server (TLS) id 8.3.279.1; Thu, 6 Sep 2012 22:36:57 -0700 Received: from localhost.localdomain (172.22.196.22) by mail.na.nai.com (10.68.48.8) with Microsoft SMTP Server id 8.3.279.1; Thu, 6 Sep 2012 22:36:56 -0700 From: To: , , Subject: [PATCH] ARM: ixp4xx: move fixed mapping of internal devices into vmalloc region Date: Fri, 7 Sep 2012 15:40:00 +1000 Message-ID: <1346996400-5824-1-git-send-email-gerg@snapgear.com> X-Mailer: git-send-email 1.5.5.1 MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [161.69.31.173 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Greg Ungerer X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Greg Ungerer The current fixed physical/virtual mappings for the internal peripherals of the ixp4xx SoC devices is using a virtual address outside of the vmalloc region. This results in kernel warnings like this on the boot console: BUG: mapping for 0xc8000000 at 0xffbeb000 out of vmalloc space BUG: mapping for 0xc4000000 at 0xffbfe000 out of vmalloc space BUG: mapping for 0xc0000000 at 0xffbff000 out of vmalloc space The virtual kernel memory layout lists this for the vmalloc region: ... vmalloc : 0xc2800000 - 0xff000000 ( 968 MB) ... With a little adjustment to the virtual address used we can map these internal devices in the vmalloc region. Signed-off-by: Greg Ungerer Acked-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h | 14 +++++++------- 1 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h index 97c530f..ad66605 100644 --- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h +++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h @@ -32,11 +32,11 @@ * * 0x6000000 0x00004000 ioremap'd QMgr * - * 0xC0000000 0x00001000 0xffbff000 PCI CFG + * 0xC0000000 0x00001000 0xfebff000 PCI CFG * - * 0xC4000000 0x00001000 0xffbfe000 EXP CFG + * 0xC4000000 0x00001000 0xfebfe000 EXP CFG * - * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals + * 0xC8000000 0x00013000 0xfebeb000 On-Chip Peripherals */ /* @@ -49,21 +49,21 @@ * Expansion BUS Configuration registers */ #define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) -#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFE000) +#define IXP4XX_EXP_CFG_BASE_VIRT (0xFEBFE000) #define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) /* * PCI Config registers */ #define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) -#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFF000) +#define IXP4XX_PCI_CFG_BASE_VIRT (0xFEBFF000) #define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) /* * Peripheral space */ #define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000) -#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBEB000) +#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFEBEB000) #define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000) /* @@ -73,7 +73,7 @@ * aligned so that it * can be used with the low-level debug code. */ #define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000) -#define IXP4XX_DEBUG_UART_BASE_VIRT (0xffb00000) +#define IXP4XX_DEBUG_UART_BASE_VIRT (0xfeb00000) #define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000) #define IXP4XX_EXP_CS0_OFFSET 0x00