| Message ID | 1347020296-18796-8-git-send-email-maxime.ripard@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Sep 07, 2012 at 02:18:16PM +0200, Maxime Ripard wrote: > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Empty commit message is never a good start. > --- > arch/arm/boot/dts/imx28-cfa10049.dts | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts > index 1f7fa50..05c892e 100644 > --- a/arch/arm/boot/dts/imx28-cfa10049.dts > +++ b/arch/arm/boot/dts/imx28-cfa10049.dts > @@ -27,6 +27,8 @@ > fsl,pinmux-ids = < > 0x0181 /* MX28_PAD_GPMI_RDN__SSP3_SCK */ > 0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */ > + 0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */ > + 0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */ What are these two pins used for? Regards, Shawn > >; > fsl,drive-strength = <1>; > fsl,voltage = <1>; > @@ -39,6 +41,25 @@ > pinctrl-names = "default"; > pinctrl-0 = <&spi3_pins_cfa10049>; > status = "okay"; > + > + gpio5: gpio5@0 { > + compatible = "fairchild,74hc595"; > + gpio-controller; > + #gpio-cells = <2>; > + reg = <0>; > + registers-number = <2>; > + spi-max-frequency = <100000>; > + }; > + > + gpio6: gpio6@1 { > + compatible = "fairchild,74hc595"; > + gpio-controller; > + #gpio-cells = <2>; > + reg = <1>; > + registers-number = <4>; > + spi-max-frequency = <100000>; > + }; > + > }; > }; > > -- > 1.7.9.5 >
Hi Shawn, Le 10/09/2012 04:23, Shawn Guo a écrit : > On Fri, Sep 07, 2012 at 02:18:16PM +0200, Maxime Ripard wrote: >> --- >> arch/arm/boot/dts/imx28-cfa10049.dts | 21 +++++++++++++++++++++ >> 1 file changed, 21 insertions(+) >> >> diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts >> index 1f7fa50..05c892e 100644 >> --- a/arch/arm/boot/dts/imx28-cfa10049.dts >> +++ b/arch/arm/boot/dts/imx28-cfa10049.dts >> @@ -27,6 +27,8 @@ >> fsl,pinmux-ids = < >> 0x0181 /* MX28_PAD_GPMI_RDN__SSP3_SCK */ >> 0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */ >> + 0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */ >> + 0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */ > > What are these two pins used for? The SSP_D3, D4 and D5 are used as chip select 0, 1 and 2 by the SSP controller when it runs in the two SPI (motorola and Winbond) modes. Thus, here, I'm using them as chip selects. Maxime
diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts index 1f7fa50..05c892e 100644 --- a/arch/arm/boot/dts/imx28-cfa10049.dts +++ b/arch/arm/boot/dts/imx28-cfa10049.dts @@ -27,6 +27,8 @@ fsl,pinmux-ids = < 0x0181 /* MX28_PAD_GPMI_RDN__SSP3_SCK */ 0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */ + 0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */ + 0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */ >; fsl,drive-strength = <1>; fsl,voltage = <1>; @@ -39,6 +41,25 @@ pinctrl-names = "default"; pinctrl-0 = <&spi3_pins_cfa10049>; status = "okay"; + + gpio5: gpio5@0 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <2>; + reg = <0>; + registers-number = <2>; + spi-max-frequency = <100000>; + }; + + gpio6: gpio6@1 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <2>; + reg = <1>; + registers-number = <4>; + spi-max-frequency = <100000>; + }; + }; };
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- arch/arm/boot/dts/imx28-cfa10049.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)