| Message ID | 1347309341-15447-3-git-send-email-maxime.ripard@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Sep 10, 2012 at 10:35 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Applied (since I already merged the DT code).
Yours,
Linus Walleij
On Tue, Sep 11, 2012 at 7:22 PM, Linus Walleij <linus.walleij@linaro.org> wrote: > On Mon, Sep 10, 2012 at 10:35 PM, Maxime Ripard > <maxime.ripard@free-electrons.com> wrote: > >> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > > Applied (since I already merged the DT code). BTW: I don't have patch 3/3 in this series, does it exist? Or can you resend it? 1/3 and 2/3 are applied. Yours, Linus Walleij
Hi Linus, Le 11/09/2012 23:52, Linus Walleij a écrit : > On Tue, Sep 11, 2012 at 7:22 PM, Linus Walleij <linus.walleij@linaro.org> wrote: >> On Mon, Sep 10, 2012 at 10:35 PM, Maxime Ripard >> <maxime.ripard@free-electrons.com> wrote: >> >>> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> >> >> Applied (since I already merged the DT code). > > BTW: I don't have patch 3/3 in this series, does it exist? Or > can you resend it? 1/3 and 2/3 are applied. Hmm, that's odd, but since it was about the CFA-10049 dts, Shawn already applied it, so I guess it's fine. Thanks, Maxime
diff --git a/Documentation/devicetree/bindings/gpio/gpio-74x164.txt b/Documentation/devicetree/bindings/gpio/gpio-74x164.txt new file mode 100644 index 0000000..cc26080 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-74x164.txt @@ -0,0 +1,22 @@ +* Generic 8-bits shift register GPIO driver + +Required properties: +- compatible : Should be "fairchild,74hc595" +- reg : chip select number +- gpio-controller : Marks the device node as a gpio controller. +- #gpio-cells : Should be two. The first cell is the pin number and + the second cell is used to specify the gpio polarity: + 0 = active high + 1 = active low +- registers-number: Number of daisy-chained shift registers + +Example: + +gpio5: gpio5@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <4>; + spi-max-frequency = <100000>; +};
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- .../devicetree/bindings/gpio/gpio-74x164.txt | 22 ++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-74x164.txt