From patchwork Thu Sep 13 15:41:48 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 1453371 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (unknown [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id AF754DF24C for ; Thu, 13 Sep 2012 16:00:09 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TCBZi-0002Jk-4O; Thu, 13 Sep 2012 15:43:30 +0000 Received: from mail-bk0-f49.google.com ([209.85.214.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TCBYf-00027m-7d for linux-arm-kernel@lists.infradead.org; Thu, 13 Sep 2012 15:42:32 +0000 Received: by bkcji2 with SMTP id ji2so642262bkc.36 for ; Thu, 13 Sep 2012 08:42:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=9T0/VRIomsbpG0CI5ttL/tM0OfAIKkWVsHKyFtp4M58=; b=tXHPjyFJmIavbgvO4JL/+iXId/ch4DCnWJzCqzxEHqKAqMhe/JAoWERDZvs/B1avMu tX0hVN5CZ9QL3tFAnqHwFIUlE9hhEqos/PNOBLevS056Uw2RneL/GTZJkhNpfWzO6AFA pz57h36MQ9OA+/N/EpExRQRU0Kkzj6yACAQbVqIOa6Wjr5l3yfJfMazdV4G4mWFpCN1G /y3aPULAwqK8hbD6VmVQjmVztJ1bTjnhNW749ycruWvn060cyWB7xn23dVvtWBCNO3Wh 6i52fW+2tMqHMVIkwmW1s43u52KlRqFNo1uwLa1tPJ3Ui6gL9VdC3JdULYmZ+qwzQaaF rjmQ== Received: by 10.204.130.25 with SMTP id q25mr1412590bks.119.1347550943925; Thu, 13 Sep 2012 08:42:23 -0700 (PDT) Received: from edge.mip.uni-hannover.de (ip118.246.mip.uni-hannover.de. [130.75.246.118]) by mx.google.com with ESMTPS id 25sm14767959bkx.9.2012.09.13.08.42.21 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 13 Sep 2012 08:42:22 -0700 (PDT) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH v4 06/10] ARM: mvebu: Add pinctrl support to Armada XP SoCs Date: Thu, 13 Sep 2012 17:41:48 +0200 Message-Id: <1347550912-18021-7-git-send-email-sebastian.hesselbarth@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1347550912-18021-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1344689809-6223-1-git-send-email-sebastian.hesselbarth@gmail.com> <1347550912-18021-1-git-send-email-sebastian.hesselbarth@gmail.com> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.214.49 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (sebastian.hesselbarth[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Thomas Petazzoni , Lior Amsalem , Russell King , Jason Cooper , Andrew Lunn , Linus Walleij , Stephen Warren , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Grant Likely , Ben Dooks , Rob Landley , Gregory CLEMENT , devicetree-discuss@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Thomas Petazzoni This commits adds the necessary device tree information to define the compatible property for the pinctrl driver instance of Armada XP SoCs. Until now, the device tree representation considered the Armada XP as a single SoC. But in fact, there are three different SoCs in the Armada XP families, with different number of CPU cores, different number of Ethernet interfaces... and different number of muxable pins or functions. We therefore introduce three armada-xp-mv78xx0.dtsi for the three SoCs of the Armada XP family. The current armada-xp-db.dts evaluation board uses the MV78460 variant of the SoC. Signed-off-by: Thomas Petazzoni Acked-by: Linus Walleij --- v3: - put specific variant into DT "model" v4: - adjust pinctrl DT node of Armada XP SoC Cc: Sebastian Hesselbarth Cc: Thomas Petazzoni Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: Russell King Cc: Lior Amsalem Cc: Andrew Lunn Cc: Jason Cooper Cc: Gregory CLEMENT Cc: Ben Dooks Cc: Linus Walleij Cc: Stephen Warren Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-doc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org --- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 28 ++++++++++++++++++++++++++++ arch/arm/boot/dts/armada-xp-mv78260.dtsi | 28 ++++++++++++++++++++++++++++ arch/arm/boot/dts/armada-xp-mv78460.dtsi | 28 ++++++++++++++++++++++++++++ 3 files changed, 84 insertions(+) create mode 100644 arch/arm/boot/dts/armada-xp-mv78230.dtsi create mode 100644 arch/arm/boot/dts/armada-xp-mv78260.dtsi create mode 100644 arch/arm/boot/dts/armada-xp-mv78460.dtsi diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi new file mode 100644 index 0000000..38ede3d --- /dev/null +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -0,0 +1,28 @@ +/* + * Device Tree Include file for Marvell Armada XP family SoC + * + * Copyright (C) 2012 Marvell + * + * Thomas Petazzoni + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * Contains definitions specific to the Armada XP MV78230 SoC that are not + * common to all Armada XP SoCs. + */ + +/include/ "armada-xp.dtsi" + +/ { + model = "Marvell Armada XP MV78230 SoC"; + compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp"; + + soc { + pinctrl { + compatible = "marvell,mv78230-pinctrl"; + reg = <0xd0018000 0x38>; + }; + }; +}; diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi new file mode 100644 index 0000000..b2eafcd --- /dev/null +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -0,0 +1,28 @@ +/* + * Device Tree Include file for Marvell Armada XP family SoC + * + * Copyright (C) 2012 Marvell + * + * Thomas Petazzoni + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * Contains definitions specific to the Armada XP MV78260 SoC that are not + * common to all Armada XP SoCs. + */ + +/include/ "armada-xp.dtsi" + +/ { + model = "Marvell Armada XP MV78260 SoC"; + compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp"; + + soc { + pinctrl { + compatible = "marvell,mv78260-pinctrl"; + reg = <0xd0018000 0x38>; + }; + }; +}; diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi new file mode 100644 index 0000000..cf8624d --- /dev/null +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -0,0 +1,28 @@ +/* + * Device Tree Include file for Marvell Armada XP family SoC + * + * Copyright (C) 2012 Marvell + * + * Thomas Petazzoni + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * Contains definitions specific to the Armada XP MV78460 SoC that are not + * common to all Armada XP SoCs. + */ + +/include/ "armada-xp.dtsi" + +/ { + model = "Marvell Armada XP MV78460 SoC"; + compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp"; + + soc { + pinctrl { + compatible = "marvell,mv78460-pinctrl"; + reg = <0xd0018000 0x38>; + }; + }; + };