From patchwork Tue Sep 18 14:24:48 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leela Krishna Amudala X-Patchwork-Id: 1471191 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id A4524DF24C for ; Tue, 18 Sep 2012 08:30:27 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TDt9L-0005vn-UN; Tue, 18 Sep 2012 08:27:21 +0000 Received: from mailout2.samsung.com ([203.254.224.25]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TDt9I-0005uX-3i for linux-arm-kernel@lists.infradead.org; Tue, 18 Sep 2012 08:27:18 +0000 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MAJ00E7HE4E2K30@mailout2.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 18 Sep 2012 17:27:08 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.126]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 9E.54.03860.C5038505; Tue, 18 Sep 2012 17:27:08 +0900 (KST) X-AuditID: cbfee61b-b7f2b6d000000f14-f5-5058305c49d6 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 3E.54.03860.C5038505; Tue, 18 Sep 2012 17:27:08 +0900 (KST) Received: from localhost.localdomain ([107.108.73.106]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MAJ005WIE4A62G0@mmp2.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 18 Sep 2012 17:27:08 +0900 (KST) From: Leela Krishna Amudala To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH V5] ARM: EXYNOS5: Add bus clock for FIMD Date: Tue, 18 Sep 2012 19:54:48 +0530 Message-id: <1347978288-27759-1-git-send-email-l.krishna@samsung.com> X-Mailer: git-send-email 1.7.0.4 DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrALMWRmVeSWpSXmKPExsWyRsSkTjfGICLAYPceQ4tNj6+xOjB6bF5S H8AYxWWTkpqTWZZapG+XwJXxecFD5oJ2sYr930+zNzC+FOxi5OSQEDCROHfmJyOELSZx4d56 ti5GLg4hgaWMEn9+HWKHKdrRfh4qMZ1RouniXyhnA5PE4r3XmECq2ASMJe7P3Qxkc3CICHhL LL+mCGIyC7hI7NrqDGIKC1hI7PmqBWKyCKhKvHxvDNLHK+Aq8X/3JBaITQoSrcsgtrIICEh8 m3yIBaRcQkBWYtMBZpCdEgJb2CQu3vzBBlEvKXFwxQ2WCYyCCxgZVjGKphYkFxQnpeca6RUn 5haX5qXrJefnbmIEBtPpf8+kdzCuarA4xCjAwajEw5sQFB4gxJpYVlyZe4hRgoNZSYTXVzoi QIg3JbGyKrUoP76oNCe1+BCjD9AlE5mlRJPzgYGeVxJvaGxibmpsamlkZGZqikNYSZxX+FNg gJBAemJJanZqakFqEcw4Jg5OqQZGdRsTgXcfJ1aKRMWee5+3bu8MIW/5eBPOjwtn/3W6p3XZ Ju/yTY5parIsuyxT0i5bOzwq4l4bPnHnZYHLPPJn1y9dx1wmcP3yoUuZT+U+nF6q0VC3yMPS T7t0SdJsb23L03aWzWGln3+28QpH5Jq9TblUPVFyr1C+wfaobQqnfR6etWtpeHdViaU4I9FQ i7moOBEAm3mEiVMCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrPLMWRmVeSWpSXmKPExsVy+t9jQd0Yg4gAg45ZOhabHl9jdWD02Lyk PoAxqoHRJiM1MSW1SCE1Lzk/JTMv3VbJOzjeOd7UzMBQ19DSwlxJIS8xN9VWycUnQNctMwdo qpJCWWJOKVAoILG4WEnfDtOE0BA3XQuYxghd35AguB4jAzSQsIYx4/OCh8wF7WIV+7+fZm9g fCnYxcjJISFgIrGj/TwbhC0mceHeeiCbi0NIYDqjRNPFv1DOBiaJxXuvMYFUsQkYS9yfuxnI 5uAQEfCWWH5NEcRkFnCR2LXVGcQUFrCQ2PNVC8RkEVCVePneGKSPV8BV4v/uSSwQmxQkWpcd Yp/AyL2AkWEVo2hqQXJBcVJ6rpFecWJucWleul5yfu4mRnCoPpPewbiqweIQowAHoxIPb0JQ eIAQa2JZcWXuIUYJDmYlEV5f6YgAId6UxMqq1KL8+KLSnNTiQ4w+QMsnMkuJJucD4yivJN7Q 2MTc1NjU0sTCxMwSh7CSOK/wp8AAIYH0xJLU7NTUgtQimHFMHJxSDYys117Wqy3adygwvNzC rV7H7oZ6W9W3RS2mNueUN+ZOr1pn5aa+8tGUDd+VhdrzBXdNUraeHLHlVJlI2pKL1m7CB7rW mXfsf1+p0vfVYIOeq+LBW75beaPZbpxUvH/pk2yk+/W1bJsMZFlkuTK7Psm2bmGaszPSfN6X Cd9V362VmMh+TMpiyyQlluKMREMt5qLiRAB7AqISggIAAA== X-CFilter-Loop: Reflected X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.3 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.25 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain 3.0 DATE_IN_FUTURE_03_06 Date: is 3 to 6 hours after Received: date -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 HDRS_LCASE Odd capitalization of message header Cc: inki.dae@samsung.com, jg1.han@samsung.com, kgene.kim@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch adds the bus clock for FIMD and changes the device name for lcd clock Signed-off-by: Leela Krishna Amudala Reviewed-by: Jingoo Han --- arch/arm/mach-exynos/clock-exynos5.c | 32 ++++++++++++++++++++++---------- 1 files changed, 22 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c index 774533c..404c53d 100644 --- a/arch/arm/mach-exynos/clock-exynos5.c +++ b/arch/arm/mach-exynos/clock-exynos5.c @@ -891,6 +891,13 @@ static struct clk exynos5_clk_mdma1 = { .ctrlbit = (1 << 4), }; +static struct clk exynos5_clk_fimd1 = { + .name = "fimd", + .devname = "exynos5-fb.1", + .enable = exynos5_clk_ip_disp1_ctrl, + .ctrlbit = (1 << 0), +}; + struct clk *exynos5_clkset_group_list[] = { [0] = &clk_ext_xtal_mux, [1] = NULL, @@ -1120,6 +1127,18 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = { .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 }, }; +struct clksrc_clk exynos5_clk_sclk_fimd1 = { + .clk = { + .name = "sclk_fimd", + .devname = "exynos5-fb.1", + .enable = exynos5_clksrc_mask_disp1_0_ctrl, + .ctrlbit = (1 << 0), + }, + .sources = &exynos5_clkset_group, + .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 }, + .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 }, +}; + static struct clksrc_clk exynos5_clksrcs[] = { { .clk = { @@ -1131,16 +1150,6 @@ static struct clksrc_clk exynos5_clksrcs[] = { .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 8, .size = 8 }, }, { .clk = { - .name = "sclk_fimd", - .devname = "s3cfb.1", - .enable = exynos5_clksrc_mask_disp1_0_ctrl, - .ctrlbit = (1 << 0), - }, - .sources = &exynos5_clkset_group, - .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 }, - .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 }, - }, { - .clk = { .name = "aclk_266_gscl", }, .sources = &clk_src_gscl_266, @@ -1240,12 +1249,14 @@ static struct clksrc_clk *exynos5_sysclks[] = { &exynos5_clk_mdout_spi0, &exynos5_clk_mdout_spi1, &exynos5_clk_mdout_spi2, + &exynos5_clk_sclk_fimd1, }; static struct clk *exynos5_clk_cdev[] = { &exynos5_clk_pdma0, &exynos5_clk_pdma1, &exynos5_clk_mdma1, + &exynos5_clk_fimd1, }; static struct clksrc_clk *exynos5_clksrc_cdev[] = { @@ -1274,6 +1285,7 @@ static struct clk_lookup exynos5_clk_lookup[] = { CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0), CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1), CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1), + CLKDEV_INIT("exynos5-fb.1", "lcd", &exynos5_clk_fimd1), }; static unsigned long exynos5_epll_get_rate(struct clk *clk)