From patchwork Thu Sep 20 06:45:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 1482981 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 2EF3EDF2D2 for ; Thu, 20 Sep 2012 07:06:05 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TEan3-0004NB-OX; Thu, 20 Sep 2012 07:03:14 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TEaYS-0001bX-Se for linux-arm-kernel@lists.infradead.org; Thu, 20 Sep 2012 06:48:11 +0000 Received: by mail-pb0-f49.google.com with SMTP id rq8so4538198pbb.36 for ; Wed, 19 Sep 2012 23:48:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=a7cuBZsgeFrjNioXczRJbaHzOuiMUf8e4qsC2ND/IJA=; b=C2NYk0zahJkvBwFeGMcaO5glNL8EEukZfeN0R5Ap8+GUcgN4lay2bdk08ljLRUn6rm JaVP3xwp8kh7oqdyB5E29X3EgpX3auv5SQNrhv+Cr6Lc/5+fSkmNap2zv/tzg4PJuhXL hDV1/YzJ6sBaBqmue+aeE+KRw5CTv27S6/B/duGketk0QtkPOkEDd69pA7df1ddujJW7 CnEhOFHbZh4AsSyUVSiRFcJWuDwx/TO3UZ6lnN1/pG3N3XrfkZufJTMYHPhAoYTdaVkT G6Uo4rhY2Xo1vunm+c63c56XHPVh1+67XfNA8iczAlDRppwzzmJqPRVFuNpk5QisI8TJ eBjA== Received: by 10.68.116.232 with SMTP id jz8mr4153569pbb.77.1348123688404; Wed, 19 Sep 2012 23:48:08 -0700 (PDT) Received: from S2101-09.ap.freescale.net ([114.216.234.161]) by mx.google.com with ESMTPS id wn1sm3057024pbc.57.2012.09.19.23.48.05 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 19 Sep 2012 23:48:07 -0700 (PDT) From: Shawn Guo To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 33/34] ARM: imx: call mxc_device_init() in soc specific function Date: Thu, 20 Sep 2012 14:45:46 +0800 Message-Id: <1348123547-31082-34-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1348123547-31082-1-git-send-email-shawn.guo@linaro.org> References: <1348123547-31082-1-git-send-email-shawn.guo@linaro.org> X-Gm-Message-State: ALoCoQnWWFL1nOA+xPKpnRuwf7SpJZjB70mmUqGAvFNgW+DDlPU5colaYRTlRBnZBPcjgkMx+fcj X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Sascha Hauer , Shawn Guo , Arnd Bergmann , Javier Martin , Rob Herring X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org mxc_device_init() is a core_initcall function used to register devices for mxc_aips_bus and mxc_ahb_bus, which are needed by gpio and dma device registration. Instead of being a core_initcall function, we have it called in soc specific initialization function before gpio and dma devices get registered, so that it will not be called for other platforms when we enable multi-platform support for imx. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 1 + arch/arm/mach-imx/devices/devices.c | 3 +-- arch/arm/mach-imx/mm-imx21.c | 2 ++ arch/arm/mach-imx/mm-imx25.c | 2 ++ arch/arm/mach-imx/mm-imx27.c | 2 ++ arch/arm/mach-imx/mm-imx3.c | 4 ++++ arch/arm/mach-imx/mm-imx5.c | 4 ++++ 7 files changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index ead9018..ef8db6b 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -79,6 +79,7 @@ extern void mxc_arch_reset_init(void __iomem *); extern int mx53_revision(void); extern int mx53_display_revision(void); extern void imx_set_aips(void __iomem *); +extern int mxc_device_init(void); enum mxc_cpu_pwr_mode { WAIT_CLOCKED, /* wfi only */ diff --git a/arch/arm/mach-imx/devices/devices.c b/arch/arm/mach-imx/devices/devices.c index 9301e07..1b37482 100644 --- a/arch/arm/mach-imx/devices/devices.c +++ b/arch/arm/mach-imx/devices/devices.c @@ -32,7 +32,7 @@ struct device mxc_ahb_bus = { .parent = &platform_bus, }; -static int __init mxc_device_init(void) +int __init mxc_device_init(void) { int ret; @@ -45,4 +45,3 @@ static int __init mxc_device_init(void) done: return ret; } -core_initcall(mxc_device_init); diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index 8868398..d8ccd3a 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c @@ -82,6 +82,8 @@ static const struct resource imx21_audmux_res[] __initconst = { void __init imx21_soc_init(void) { + mxc_device_init(); + mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index 9be33cd..9357707 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c @@ -89,6 +89,8 @@ static const struct resource imx25_audmux_res[] __initconst = { void __init imx25_soc_init(void) { + mxc_device_init(); + /* i.mx25 has the i.mx35 type gpio */ mxc_register_gpio("imx35-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); mxc_register_gpio("imx35-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index ecaa5b9..4f1be65 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c @@ -82,6 +82,8 @@ static const struct resource imx27_audmux_res[] __initconst = { void __init imx27_soc_init(void) { + mxc_device_init(); + /* i.mx27 has the i.mx21 type gpio */ mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 072b3bf..f718bf5 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -175,6 +175,8 @@ void __init imx31_soc_init(void) imx3_init_l2x0(); + mxc_device_init(); + mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); @@ -271,6 +273,8 @@ void __init imx35_soc_init(void) imx3_init_l2x0(); + mxc_device_init(); + mxc_register_gpio("imx35-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); mxc_register_gpio("imx35-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); mxc_register_gpio("imx35-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index e739553..f92caf1 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c @@ -138,6 +138,8 @@ static const struct resource imx51_audmux_res[] __initconst = { void __init imx50_soc_init(void) { + mxc_device_init(); + /* i.mx50 has the i.mx35 type gpio */ mxc_register_gpio("imx35-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); mxc_register_gpio("imx35-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); @@ -153,6 +155,8 @@ void __init imx50_soc_init(void) void __init imx51_soc_init(void) { + mxc_device_init(); + /* i.mx51 has the i.mx35 type gpio */ mxc_register_gpio("imx35-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH); mxc_register_gpio("imx35-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH);