From patchwork Thu Sep 20 08:51:39 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 1483331 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 562903FE65 for ; Thu, 20 Sep 2012 08:54:34 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TEcUq-0004fg-Vc; Thu, 20 Sep 2012 08:52:33 +0000 Received: from mailout4.samsung.com ([203.254.224.34]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TEcUb-0004cQ-HS for linux-arm-kernel@lists.infradead.org; Thu, 20 Sep 2012 08:52:18 +0000 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MAN00J2L4MIN500@mailout4.samsung.com> for linux-arm-kernel@lists.infradead.org; Thu, 20 Sep 2012 17:52:14 +0900 (KST) X-AuditID: cbfee61b-b7f2b6d000000f14-1f-505ad93e18f5 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 25.E1.03860.E39DA505; Thu, 20 Sep 2012 17:52:14 +0900 (KST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MAN001S64MRTC90@mmp2.samsung.com> for linux-arm-kernel@lists.infradead.org; Thu, 20 Sep 2012 17:52:14 +0900 (KST) From: Tomasz Figa To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/6] pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa Date: Thu, 20 Sep 2012 10:51:39 +0200 Message-id: <1348131104-24828-2-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 1.7.10 In-reply-to: <1348131104-24828-1-git-send-email-t.figa@samsung.com> References: <1348131104-24828-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrEJMWRmVeSWpSXmKPExsVy+t9jQV27m1EBBt+2mFtsenyN1YHRY/OS +gDGKC6blNSczLLUIn27BK6MDZ2HmQvmC1Ys2zORsYHxCF8XIyeHhICJRPuZf6wQtpjEhXvr 2boYuTiEBKYzSjw838EI4WxmktgwYRIzSBWbgJrE54ZHbCC2iICGxJSux+wgRcwC+xglpl7a zQKSEBaIk9h27RMTiM0ioCqx5tMsIJuDg1fASWL2Jx2IbfIST+/3gc3hFHCWOPWgE2y+EFDJ 3Mur2SYw8i5gZFjFKJpakFxQnJSea6RXnJhbXJqXrpecn7uJEezzZ9I7GFc1WBxiFOBgVOLh vSUcFSDEmlhWXJl7iFGCg1lJhHfjRKAQb0piZVVqUX58UWlOavEhRmkOFiVxXuFPgQFCAumJ JanZqakFqUUwWSYOTqkGRkNdCbaWFodVXWekOaLf6yyXfPLrqvzF5bvjahn+fwl4KGG0yFPv N/sF0R9800S8n/7hqO6qfs7/tIR9C5uN5eGN/Ddjmrb8PXcth0NV8UXeqfeMCkpRfuyX8/0b X09bY/Vp8QS3sjnzT+vJPPC3SeVdZn7NP+ouB9PRtv05W371vnJxXnxgghJLcUaioRZzUXEi AC0Hgxb1AQAA X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.4 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.34 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kgene.kim@samsung.com, linus.walleij@linaro.org, kyungmin.park@samsung.com, linux-samsung-soc@vger.kernel.org, thomas.abraham@linaro.org, t.figa@samsung.com, m.szyprowski@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Pins used as GPIO interrupts need to be configured as EINTs. This patch adds the required configuration code to exynos_gpio_irq_set_type, to set the pin as EINT when its interrupt trigger is configured. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/pinctrl/pinctrl-exynos.c | 12 ++++++++++++ drivers/pinctrl/pinctrl-exynos.h | 1 + 2 files changed, 13 insertions(+) diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c index 447818d..c2fa85f 100644 --- a/drivers/pinctrl/pinctrl-exynos.c +++ b/drivers/pinctrl/pinctrl-exynos.c @@ -76,9 +76,11 @@ static int exynos_gpio_irq_set_type(struct irq_data *irqd, unsigned int type) struct samsung_pinctrl_drv_data *d = irqd->domain->host_data; struct samsung_pin_ctrl *ctrl = d->ctrl; struct exynos_geint_data *edata = irq_data_get_irq_handler_data(irqd); + struct samsung_pin_bank *bank = edata->bank; unsigned int shift = EXYNOS_EINT_CON_LEN * edata->pin; unsigned int con, trig_type; unsigned long reg_con = ctrl->geint_con + edata->eint_offset; + unsigned int mask; switch (type) { case IRQ_TYPE_EDGE_RISING: @@ -110,6 +112,16 @@ static int exynos_gpio_irq_set_type(struct irq_data *irqd, unsigned int type) con &= ~(EXYNOS_EINT_CON_MASK << shift); con |= trig_type << shift; writel(con, d->virt_base + reg_con); + + reg_con = bank->pctl_offset; + shift = edata->pin * bank->func_width; + mask = (1 << bank->func_width) - 1; + + con = readl(d->virt_base + reg_con); + con &= ~(mask << shift); + con |= EXYNOS_EINT_FUNC << shift; + writel(con, d->virt_base + reg_con); + return 0; } diff --git a/drivers/pinctrl/pinctrl-exynos.h b/drivers/pinctrl/pinctrl-exynos.h index 5f27ba9..31d0a06 100644 --- a/drivers/pinctrl/pinctrl-exynos.h +++ b/drivers/pinctrl/pinctrl-exynos.h @@ -144,6 +144,7 @@ enum exynos4210_gpio_xc_start { #define EXYNOS_WKUP_EMASK_OFFSET 0xF00 #define EXYNOS_WKUP_EPEND_OFFSET 0xF40 #define EXYNOS_SVC_OFFSET 0xB08 +#define EXYNOS_EINT_FUNC 0xF /* helpers to access interrupt service register */ #define EXYNOS_SVC_GROUP_SHIFT 3