From patchwork Tue Sep 25 16:33:43 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 1506131 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id ED1A5DFE80 for ; Tue, 25 Sep 2012 16:40:35 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TGY90-0002BC-1D; Tue, 25 Sep 2012 16:37:58 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TGY5U-0000V8-Os for linux-arm-kernel@lists.infradead.org; Tue, 25 Sep 2012 16:34:22 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id q8PGYKN2014097; Tue, 25 Sep 2012 11:34:20 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8PGYKor001098; Tue, 25 Sep 2012 11:34:20 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.1.323.3; Tue, 25 Sep 2012 11:34:19 -0500 Received: from localhost.localdomain (h64-6.vpn.ti.com [172.24.64.6]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8PGY1Bn005410; Tue, 25 Sep 2012 11:34:18 -0500 From: Tero Kristo To: , , Subject: [PATCHv7 11/21] TEMP: ARM: OMAP3: beagle rev-c4: enable OPP6 Date: Tue, 25 Sep 2012 19:33:43 +0300 Message-ID: <1348590833-12335-12-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1348590833-12335-1-git-send-email-t-kristo@ti.com> References: <1348590833-12335-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.7 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.153 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.8 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Beagleboard rev-c4 has a speed sorted OMAP3530 chip which can run at 720MHz. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/board-omap3beagle.c | 29 +++++++++++++++++++++++++++++ arch/arm/mach-omap2/opp3xxx_data.c | 4 ++++ 2 files changed, 33 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 6202fc7..0d2a45f 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -459,6 +459,35 @@ static void __init beagle_opp_init(void) return; } + if (omap3_beagle_version == OMAP3BEAGLE_BOARD_C4) { + struct device *mpu_dev, *iva_dev; + + mpu_dev = omap_device_get_by_hwmod_name("mpu"); + iva_dev = omap_device_get_by_hwmod_name("iva"); + + if (!mpu_dev || !iva_dev) { + pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", + __func__, mpu_dev, iva_dev); + return; + } + /* Enable MPU 720MHz opp */ + r = opp_enable(mpu_dev, 720000000); + + /* Enable IVA 520MHz opp */ + r |= opp_enable(iva_dev, 520000000); + + if (r) { + pr_err("%s: failed to enable higher opp %d\n", + __func__, r); + /* + * Cleanup - disable the higher freqs - we dont care + * about the results + */ + opp_disable(mpu_dev, 720000000); + opp_disable(iva_dev, 520000000); + } + } + /* Custom OPP enabled for all xM versions */ if (cpu_is_omap3630()) { struct device *mpu_dev, *iva_dev; diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c index d95f3f9..a0f5fe1 100644 --- a/arch/arm/mach-omap2/opp3xxx_data.c +++ b/arch/arm/mach-omap2/opp3xxx_data.c @@ -98,6 +98,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[] = { OPP_INITIALIZER("mpu", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV), /* MPU OPP5 */ OPP_INITIALIZER("mpu", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV), + /* MPU OPP6 : omap3530 high speed grade only */ + OPP_INITIALIZER("mpu", false, 720000000, OMAP3430_VDD_MPU_OPP5_UV), /* * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is @@ -123,6 +125,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[] = { OPP_INITIALIZER("iva", true, 400000000, OMAP3430_VDD_MPU_OPP4_UV), /* DSP OPP5 */ OPP_INITIALIZER("iva", true, 430000000, OMAP3430_VDD_MPU_OPP5_UV), + /* DSP OPP6 : omap3530 high speed grade only */ + OPP_INITIALIZER("iva", false, 520000000, OMAP3430_VDD_MPU_OPP5_UV), }; static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {