From patchwork Tue Sep 25 16:33:53 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 1506231 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id E94D540079 for ; Tue, 25 Sep 2012 16:45:10 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TGYDD-0005O2-0F; Tue, 25 Sep 2012 16:42:19 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TGY5k-0000YI-Nj for linux-arm-kernel@lists.infradead.org; Tue, 25 Sep 2012 16:34:41 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id q8PGYaY1014140; Tue, 25 Sep 2012 11:34:36 -0500 Received: from DLEE74.ent.ti.com (dlee74.ent.ti.com [157.170.170.8]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8PGYaoL001354; Tue, 25 Sep 2012 11:34:36 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE74.ent.ti.com (157.170.170.8) with Microsoft SMTP Server id 14.1.323.3; Tue, 25 Sep 2012 11:34:35 -0500 Received: from localhost.localdomain (h64-6.vpn.ti.com [172.24.64.6]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q8PGY1Bx005410; Tue, 25 Sep 2012 11:34:34 -0500 From: Tero Kristo To: , , Subject: [PATCHv7 21/21] ARM: OMAP4: vc: auto retention support Date: Tue, 25 Sep 2012 19:33:53 +0300 Message-ID: <1348590833-12335-22-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1348590833-12335-1-git-send-email-t-kristo@ti.com> References: <1348590833-12335-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.7 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.153 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.8 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch adds callbacks for the voltdm sleep / wakeups, which are now used for enabling / disabling auto retention voltage control. Once a voltage domain is ready to idle, its auto retention mode is enabled. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/prm-regbits-44xx.h | 5 +++ arch/arm/mach-omap2/vc.c | 52 ++++++++++++++++++++++++++++++++ arch/arm/mach-omap2/vc.h | 4 ++ arch/arm/mach-omap2/vc44xx_data.c | 6 ++++ 4 files changed, 67 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/prm-regbits-44xx.h b/arch/arm/mach-omap2/prm-regbits-44xx.h index 3cb247b..15b9599 100644 --- a/arch/arm/mach-omap2/prm-regbits-44xx.h +++ b/arch/arm/mach-omap2/prm-regbits-44xx.h @@ -81,6 +81,11 @@ #define OMAP4430_AIPOFF_MASK (1 << 8) /* Used by PRM_VOLTCTRL */ +#define OMAP4430_AUTO_CTRL_VDD_DISABLED 0 +#define OMAP4430_AUTO_CTRL_VDD_SLEEP 1 +#define OMAP4430_AUTO_CTRL_VDD_RET 2 + +/* Used by PRM_VOLTCTRL */ #define OMAP4430_AUTO_CTRL_VDD_CORE_L_SHIFT 0 #define OMAP4430_AUTO_CTRL_VDD_CORE_L_MASK (0x3 << 0) diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index d217bbf..c607a0c 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -568,11 +568,63 @@ static void omap4_set_timings(struct voltagedomain *voltdm, bool off_mode) __raw_writel(val, OMAP4_SCRM_CLKSETUPTIME); } +/** + * omap4_vc_sleep - voltagedomain sleep entry callback + * @voltdm: domain which is entering idle + * + * This function is called once a voltagedomain is ready to enter idle. + * Sets up AUTO_RET / AUTO_SLEEP command to be sent through the I2C + * to the PMIC. + */ +static void omap4_vc_sleep(struct voltagedomain *voltdm) +{ + u32 val; + u32 voltctrl; + + switch (voltdm->target_state) { + case PWRDM_POWER_OFF: + case PWRDM_POWER_RET: + val = OMAP4430_AUTO_CTRL_VDD_RET; + break; + default: + val = OMAP4430_AUTO_CTRL_VDD_SLEEP; + break; + } + voltctrl = voltdm->read(OMAP4_PRM_VOLTCTRL_OFFSET); + + voltctrl &= ~(u32)voltdm->vc->voltctrl_mask; + + voltctrl |= val << voltdm->vc->voltctrl_shift; + + voltdm->write(voltctrl, OMAP4_PRM_VOLTCTRL_OFFSET); +} + +/** + * omap4_vc_wakeup - voltagedomain wakeup callback + * @voltdm: domain which is leaving idle + * + * This function is called once a voltagedomain is becoming active. + * Disables AUTO_RET / AUTO_SLEEP for the domain. + */ +static void omap4_vc_wakeup(struct voltagedomain *voltdm) +{ + u32 voltctrl; + + voltctrl = voltdm->read(OMAP4_PRM_VOLTCTRL_OFFSET); + + voltctrl &= ~(u32)voltdm->vc->voltctrl_mask; + + voltdm->write(voltctrl, OMAP4_PRM_VOLTCTRL_OFFSET); +} + /* OMAP4 specific voltage init functions */ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) { omap4_set_timings(voltdm, true); omap4_set_timings(voltdm, false); + + voltdm->sleep = omap4_vc_sleep; + voltdm->wakeup = omap4_vc_wakeup; } struct i2c_init_data { diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index 91c8d75..8357d57 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -79,6 +79,8 @@ struct omap_vc_common { * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start * @cfg_channel_reg: VC channel configuration register * @cfg_channel_sa_shift: bit shift for slave address cfg_channel register + * @voltctrl_shift: bit shift for voltctrl register field + * @voltctrl_mask: bit mask for voltctrl register field * @flags: VC channel-specific flags (optional) */ struct omap_vc_channel { @@ -100,6 +102,8 @@ struct omap_vc_channel { u8 smps_cmdra_reg; u8 cfg_channel_reg; u8 cfg_channel_sa_shift; + u8 voltctrl_shift; + u8 voltctrl_mask; u8 flags; }; diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index 085e5d6..a003a1f 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -59,6 +59,8 @@ struct omap_vc_channel omap4_vc_mpu = { .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK, .cfg_channel_sa_shift = OMAP4430_SA_VDD_MPU_L_SHIFT, + .voltctrl_shift = OMAP4430_AUTO_CTRL_VDD_MPU_L_SHIFT, + .voltctrl_mask = OMAP4430_AUTO_CTRL_VDD_MPU_L_MASK, }; struct omap_vc_channel omap4_vc_iva = { @@ -72,6 +74,8 @@ struct omap_vc_channel omap4_vc_iva = { .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK, .cfg_channel_sa_shift = OMAP4430_SA_VDD_IVA_L_SHIFT, + .voltctrl_shift = OMAP4430_AUTO_CTRL_VDD_IVA_L_SHIFT, + .voltctrl_mask = OMAP4430_AUTO_CTRL_VDD_IVA_L_MASK, }; struct omap_vc_channel omap4_vc_core = { @@ -85,6 +89,8 @@ struct omap_vc_channel omap4_vc_core = { .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK, .cfg_channel_sa_shift = OMAP4430_SA_VDD_CORE_L_SHIFT, + .voltctrl_shift = OMAP4430_AUTO_CTRL_VDD_CORE_L_SHIFT, + .voltctrl_mask = OMAP4430_AUTO_CTRL_VDD_CORE_L_MASK, }; /*