From patchwork Wed Oct 3 14:29:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: avinash philip X-Patchwork-Id: 1541771 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 93D44DFF71 for ; Wed, 3 Oct 2012 14:50:54 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TJQG5-0007Kv-RJ; Wed, 03 Oct 2012 14:49:09 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TJQG2-0007K2-Eb; Wed, 03 Oct 2012 14:49:07 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id q93Emp4G010851; Wed, 3 Oct 2012 09:48:52 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q93EmoiA007459; Wed, 3 Oct 2012 20:18:50 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Wed, 3 Oct 2012 20:18:49 +0530 Received: from ucmsshproxy.india.ext.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with SMTP id q93EmniN014386; Wed, 3 Oct 2012 20:18:49 +0530 Received: from symphony.india.ext.ti.com (unknown [192.168.247.13]) by ucmsshproxy.india.ext.ti.com (Postfix) with ESMTP id 6D218158002; Wed, 3 Oct 2012 20:18:49 +0530 (IST) Received: from localhost.localdomain (linux-psp-server [192.168.247.76]) by symphony.india.ext.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id q93Emn708621; Wed, 3 Oct 2012 20:18:49 +0530 (IST) From: "Philip, Avinash" To: , , Subject: [PATCH 1/4] mtd: nand: omap2: Update nerrors using ecc.strength Date: Wed, 3 Oct 2012 19:59:46 +0530 Message-ID: <1349274589-11389-2-git-send-email-avinashphilip@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1349274589-11389-1-git-send-email-avinashphilip@ti.com> References: <1349274589-11389-1-git-send-email-avinashphilip@ti.com> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -9.0 (---------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-9.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.40 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -2.1 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: afzal@ti.com, linux-doc@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, ivan.djelic@parrot.com, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Update number of errors using nand ecc strength. Also add macro definitions BCH8_ERROR_MAX & BCH4_ERROR_MAX Signed-off-by: Philip, Avinash --- :100644 100644 5b31386... af511a9... M drivers/mtd/nand/omap2.c drivers/mtd/nand/omap2.c | 12 ++++++++---- 1 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 5b31386..af511a9 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -111,6 +111,9 @@ #define ECCCLEAR 0x100 #define ECC1 0x1 +#define BCH8_MAX_ERROR 8 /* upto 8 bit coorectable */ +#define BCH4_MAX_ERROR 4 /* upto 4 bit correctable */ + /* oob info generated runtime depending on ecc algorithm and layout selected */ static struct nand_ecclayout omap_oobinfo; /* Define some generic bad / good block scan pattern which are used @@ -1034,7 +1037,7 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode) mtd); struct nand_chip *chip = mtd->priv; - nerrors = (info->nand.ecc.bytes == 13) ? 8 : 4; + nerrors = info->nand.ecc.strength; dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0; /* * Program GPMC to perform correction on one 512-byte sector at a time. @@ -1129,13 +1132,14 @@ static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt) struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, mtd); #ifdef CONFIG_MTD_NAND_OMAP_BCH8 - const int hw_errors = 8; + const int hw_errors = BCH8_MAX_ERROR; #else - const int hw_errors = 4; + const int hw_errors = BCH4_MAX_ERROR; #endif info->bch = NULL; - max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ? 8 : 4; + max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ? + BCH8_MAX_ERROR : BCH4_MAX_ERROR; if (max_errors != hw_errors) { pr_err("cannot configure %d-bit BCH ecc, only %d-bit supported", max_errors, hw_errors);