From patchwork Wed Oct 3 23:00:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 1543811 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 434EA3FD56 for ; Wed, 3 Oct 2012 23:02:59 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TJXw4-0007TR-MR; Wed, 03 Oct 2012 23:01:00 +0000 Received: from mail-da0-f49.google.com ([209.85.210.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TJXvj-0007RS-OK for linux-arm-kernel@lists.infradead.org; Wed, 03 Oct 2012 23:00:41 +0000 Received: by dajq27 with SMTP id q27so2777374daj.36 for ; Wed, 03 Oct 2012 16:00:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=jd93FhskqzUZkiSduuhBosr8e5+r043aiz4Qb3p6x5Y=; b=mlWewcjDpZyCeu3aACFTMaUDYwyNW07nm1cyY0HpXfRpyj198VuQQZRJM4tqzTnUbL 39fBd/wjswPg9Bbp3afNaU+wi1rUSkMWvSFvlEnhvvLVsvl5LlFEsCoBDxE9RlO2zxa5 M1EvTh04/2iw1tzOUleeKwv2VlbzN9h3NFrzyRvo8Od96HRGygk3pCr2pnpvx/ocHEkh XAknMXhCTTZrDM1OysMGR0o5QcGEafCJFPAHJaNQC8HFk5tdlHMBKo/a3hvhUX3SOF3n Z83wmokjoZuvqD2nszRCoLltH1qDkAMYRBN1RgRwEAVf7PqgWYvmze87UHOoABCXX6tZ PegA== Received: by 10.68.129.5 with SMTP id ns5mr16440999pbb.103.1349305238266; Wed, 03 Oct 2012 16:00:38 -0700 (PDT) Received: from localhost (c-24-19-7-36.hsd1.wa.comcast.net. [24.19.7.36]) by mx.google.com with ESMTPS id st6sm3255346pbc.58.2012.10.03.16.00.37 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 03 Oct 2012 16:00:37 -0700 (PDT) From: Kevin Hilman To: "Rafael J. Wysocki" , linux-omap@vger.kernel.org Subject: [PATCH 3/4] cpufreq: OMAP: fix clock usage to be SoC independent, remove plat/ includes Date: Wed, 3 Oct 2012 16:00:28 -0700 Message-Id: <1349305229-28480-4-git-send-email-khilman@deeprootsystems.com> X-Mailer: git-send-email 1.7.9.2 In-Reply-To: <1349305229-28480-1-git-send-email-khilman@deeprootsystems.com> References: <1349305229-28480-1-git-send-email-khilman@deeprootsystems.com> X-Gm-Message-State: ALoCoQmvsXOV4jEqC3mTDrpovWN7LqPEUjZ36VEfav1C0Lvo3sbrzLjiUzKnpK4zysUQXtavXIq6 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Paul Walmsley OMAP core code now has SoC-independent clock alias for the scalable CPU clock. Using it means driver is SoC independent and will work for AM3xxx SoCs as well as OMAP1/3/4. While here, remove some unnecessary plat/ includes that are interfering with multi-subarch ARM kernels. Signed-off-by: Paul Walmsley Cc: Rafael J. Wysocki [tony@atomide.com: updated already changed clock aliases] Signed-off-by: Tony Lindgren [khilman@ti.com: minor shortlog/changelog updates] Signed-off-by: Kevin Hilman --- drivers/cpufreq/omap-cpufreq.c | 19 +------------------ 1 file changed, 1 insertion(+), 18 deletions(-) diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c index 7d4d455..5d1f5e4 100644 --- a/drivers/cpufreq/omap-cpufreq.c +++ b/drivers/cpufreq/omap-cpufreq.c @@ -30,19 +30,14 @@ #include #include -#include -#include #include -#include - /* OPP tolerance in percentage */ #define OPP_TOLERANCE 4 static struct cpufreq_frequency_table *freq_table; static atomic_t freq_table_users = ATOMIC_INIT(0); static struct clk *mpu_clk; -static char *mpu_clk_name; static struct device *mpu_dev; static struct regulator *mpu_reg; @@ -179,7 +174,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) { int result = 0; - mpu_clk = clk_get(NULL, mpu_clk_name); + mpu_clk = clk_get(NULL, "cpufreq_ck"); if (IS_ERR(mpu_clk)) return PTR_ERR(mpu_clk); @@ -260,18 +255,6 @@ static struct cpufreq_driver omap_driver = { static int __init omap_cpufreq_init(void) { - if (cpu_is_omap24xx()) - mpu_clk_name = "virt_prcm_set"; - else if (cpu_is_omap34xx()) - mpu_clk_name = "dpll1_ck"; - else if (cpu_is_omap44xx()) - mpu_clk_name = "dpll_mpu_ck"; - - if (!mpu_clk_name) { - pr_err("%s: unsupported Silicon?\n", __func__); - return -EINVAL; - } - mpu_dev = omap_device_get_by_hwmod_name("mpu"); if (IS_ERR(mpu_dev)) { pr_warning("%s: unable to get the mpu device\n", __func__);