From patchwork Sun Oct 7 07:43:58 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Guittot X-Patchwork-Id: 1562131 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 28CF4DFF71 for ; Sun, 7 Oct 2012 21:06:30 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TKy1g-00029w-UK; Sun, 07 Oct 2012 21:04:41 +0000 Received: from mail-wg0-f49.google.com ([74.125.82.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TKlXY-0000cd-U3 for linux-arm-kernel@lists.infradead.org; Sun, 07 Oct 2012 07:44:45 +0000 Received: by mail-wg0-f49.google.com with SMTP id gg4so1823789wgb.18 for ; Sun, 07 Oct 2012 00:44:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=WYHoVXggd//voYw7BQbOxQ5D7o1ESoWfiwZf4apKuEw=; b=RyA2OSWTGG2eNzsS3wJz6UsO+E0nR4pIJb2gUqlkKio9DQQIffSBgwga7ggDRKd6eM FR3bf//PNIlLUY60gg8WPZXeqseM8IrvClf8iRiF+WnguuloTCioOolKtBMcjIhqHKDR 31x/oV3r4w4vkTFDu6lluOh2nz4yAaSmPJxgW6wsu9IhZx7YCTqkUKJ3rdxOy/7f7hTI I7cMlrsYuK4E7B4xJoD4ye22376BMaBxjpxr730eX+xRP1kXm10yQTuV00XkyHMUBnmz u8FDl9rdPuLNb/kOiQBKDzP+ms+xIZN5nKRI4T7VFNwVJDcpk7hEh1rusGwlDQqfUaXL grbA== Received: by 10.180.91.169 with SMTP id cf9mr13318113wib.1.1349595884581; Sun, 07 Oct 2012 00:44:44 -0700 (PDT) Received: from lmenx30s.lme.st.com (pas72-1-88-161-60-229.fbx.proxad.net. [88.161.60.229]) by mx.google.com with ESMTPS id j8sm12495245wiy.9.2012.10.07.00.44.42 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 07 Oct 2012 00:44:43 -0700 (PDT) From: Vincent Guittot To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linaro-dev@lists.linaro.org, peterz@infradead.org, mingo@redhat.com, pjt@google.com, linux@arm.linux.org.uk Subject: [RFC 6/6] ARM: sched: clear SD_SHARE_POWERLINE Date: Sun, 7 Oct 2012 09:43:58 +0200 Message-Id: <1349595838-31274-7-git-send-email-vincent.guittot@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1349595838-31274-1-git-send-email-vincent.guittot@linaro.org> References: <1349595838-31274-1-git-send-email-vincent.guittot@linaro.org> X-Gm-Message-State: ALoCoQmm0hpRi8B8X6gQZ9ZjGD5GFs6KtZcw1Kf4fSN/LVEUNjLWJ7iYQn3JK96zp32yy01hQHLK X-Bad-Reply: References and In-Reply-To but no 'Re:' in Subject. X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-Mailman-Approved-At: Sun, 07 Oct 2012 17:03:37 -0400 Cc: Vincent Guittot X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The ARM platforms take advantage of packing small tasks on few cores. This is true even when the cores of a cluster can't be powergated independantly. Signed-off-by: Vincent Guittot --- arch/arm/kernel/topology.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 26c12c6..00511d0 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -226,6 +226,11 @@ static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {} */ struct cputopo_arm cpu_topology[NR_CPUS]; +int arch_sd_share_power_line(void) +{ + return 0*SD_SHARE_POWERLINE; +} + const struct cpumask *cpu_coregroup_mask(int cpu) { return &cpu_topology[cpu].core_sibling;