From patchwork Sun Oct 7 11:29:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Baatz X-Patchwork-Id: 1560981 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 3D1104025F for ; Sun, 7 Oct 2012 11:31:25 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TKp36-0005Iu-Sl; Sun, 07 Oct 2012 11:29:32 +0000 Received: from mail-wg0-f49.google.com ([74.125.82.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TKp31-0005I0-Oe for linux-arm-kernel@lists.infradead.org; Sun, 07 Oct 2012 11:29:30 +0000 Received: by mail-wg0-f49.google.com with SMTP id gg4so1888807wgb.18 for ; Sun, 07 Oct 2012 04:29:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=8wpQn4ivPLl/NPik9slSdhTWfOXY4BOT+ce5NrDRqLA=; b=Ns4cy5oheQpl0qRpoZqviwDb02TCDdyZH4tzPQF/h0j8TFqAocpyLCdKcWSu951xfR 9G21xb+Xf7D3y2j9j3Npfxdf9FabyjCUu1ixCGq3032M2Pxwug8jAGHjIUunM9gaUcuC uc9s5ui6UraVF51b0wwH2u/BblV2NCYEzClpzeiX2PCotuYrP7N7ptvc2PGY2b6gxmnt x8qI6AlkDZydRaBDUuC8BXEtQqxx6XZ6syUU2ZaV+5YyW/+qGyw5DLvG87EeuLknZRLl VEOzs/dVUcU2FZSeHXZO47MU+XddpLI+JkCWnlVoTg86waVT1K8ZTacU580LMXWcFldQ uwSQ== Received: by 10.216.213.28 with SMTP id z28mr8716105weo.47.1349609364551; Sun, 07 Oct 2012 04:29:24 -0700 (PDT) Received: from gandalf.schnuecks.de (p5DE8D16E.dip.t-dialin.net. [93.232.209.110]) by mx.google.com with ESMTPS id fb20sm15170048wid.1.2012.10.07.04.29.23 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 07 Oct 2012 04:29:24 -0700 (PDT) Received: by gandalf.schnuecks.de (Postfix, from userid 500) id BFA0540165; Sun, 7 Oct 2012 13:29:22 +0200 (CEST) From: Simon Baatz To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V2 1/2] ARM: remove unnecessary flush of anon pages in flush_dcache_page() Date: Sun, 7 Oct 2012 13:29:11 +0200 Message-Id: <1349609352-6408-2-git-send-email-gmbnomis@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1349609352-6408-1-git-send-email-gmbnomis@gmail.com> References: <1349609352-6408-1-git-send-email-gmbnomis@gmail.com> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.49 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (gmbnomis[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: catalin.marinas@arm.com, linux@arm.linux.org.uk, jason@lakedaemon.net, andrew@lunn.ch X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On non-aliasing VIPT D-caches, there is no need to flush the kernel mapping of anon pages in flush_dcache_page() directly. If the page is mapped as executable later, the necessary D/I-cache flush will be done in __sync_icache_dcache(). Signed-off-by: Simon Baatz Cc: Catalin Marinas Cc: Russell King Acked-by: Catalin Marinas --- Changes: in V2: - Followed Catalin's suggestion to reverse the order of the patches - Clarified comment for flush_dcache_page() arch/arm/mm/flush.c | 45 ++++++++++++++++++++++++++------------------- 1 file changed, 26 insertions(+), 19 deletions(-) diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index 40ca11e..5c474a1 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c @@ -257,16 +257,20 @@ void __sync_icache_dcache(pte_t pteval) * of this page. * * We have three cases to consider: - * - VIPT non-aliasing cache: fully coherent so nothing required. - * - VIVT: fully aliasing, so we need to handle every alias in our - * current VM view. - * - VIPT aliasing: need to handle one alias in our current VM view. + * - VIPT non-aliasing D-cache: + * D-cache: fully coherent so nothing required. + * I-cache: Ensure I/D coherency in case of an already mapped page; + * __sync_icache_dcache() will handle the other cases. + * - VIPT aliasing D-cache: + * D-cache: need to handle one alias in our current VM view. + * I-cache: same as VIPT non-aliasing cache. + * - VIVT D-cache: fully aliasing, so we need to handle every alias in our + * current VM view. * - * If we need to handle aliasing: - * If the page only exists in the page cache and there are no user - * space mappings, we can be lazy and remember that we may have dirty - * kernel cache lines for later. Otherwise, we assume we have - * aliasing mappings. + * If the page only exists in the page cache and there are no user + * space mappings, we can be lazy and remember that we may have dirty + * kernel cache lines for later. Otherwise, we assume we have + * aliasing mappings. * * Note that we disable the lazy flush for SMP configurations where * the cache maintenance operations are not automatically broadcasted. @@ -284,17 +288,20 @@ void flush_dcache_page(struct page *page) mapping = page_mapping(page); - if (!cache_ops_need_broadcast() && - mapping && !mapping_mapped(mapping)) - clear_bit(PG_dcache_clean, &page->flags); - else { - __flush_dcache_page(mapping, page); - if (mapping && cache_is_vivt()) - __flush_dcache_aliases(mapping, page); - else if (mapping) - __flush_icache_all(); - set_bit(PG_dcache_clean, &page->flags); + if (!cache_ops_need_broadcast()) { + if ((mapping && !mapping_mapped(mapping)) || + (!mapping && cache_is_vipt_nonaliasing())) { + clear_bit(PG_dcache_clean, &page->flags); + return; + } } + + __flush_dcache_page(mapping, page); + if (mapping && cache_is_vivt()) + __flush_dcache_aliases(mapping, page); + else if (mapping) + __flush_icache_all(); + set_bit(PG_dcache_clean, &page->flags); } EXPORT_SYMBOL(flush_dcache_page);