From patchwork Mon Oct 8 06:06:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 1563991 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id E5959DFFAD for ; Mon, 8 Oct 2012 06:09:47 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TL6VW-0000vc-2a; Mon, 08 Oct 2012 06:08:02 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TL6VR-0000vO-T6 for linux-arm-kernel@lists.infradead.org; Mon, 08 Oct 2012 06:07:58 +0000 Received: by mail-pb0-f49.google.com with SMTP id xa7so4023570pbc.36 for ; Sun, 07 Oct 2012 23:07:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=mYQ0i/fZwmPftK881MtX0d6iFmjlQaZBxN9kTHcC/eM=; b=NS63/J647DaR7w8fTw9AeIczJRgpubYJ3fPVq4XXJKzLWRfRYKEHjoKoLALAd1Fcf8 8lVdej+FSt+lkbbHIgi2Hq8ug3Q2rwnPmoZdz27junpS+7EBUwljkONmgpmJb6mDQFg7 lNJDAExZnApVXMwh30xXH/jPce8K+u4rULQYUmC+or5x9xlAETbppG9EFZg/psoNm67n /Wsk7/hMgqaYf/6gp5i5nyxQUBQumlSNxdBz/OYO/msMj5eg3D6MocgfiiVyAVVLoaG0 2WBjEwNHQsU+KuM1QXRrG/2hGpJTXV0ulnmKT1HqfKnqTTwSBKH3aQBCA61wyhdWXaLW DBEg== Received: by 10.68.226.136 with SMTP id rs8mr10403039pbc.153.1349676475947; Sun, 07 Oct 2012 23:07:55 -0700 (PDT) Received: from S2101-09.ap.freescale.net ([117.82.24.144]) by mx.google.com with ESMTPS id j9sm9230528paw.2.2012.10.07.23.07.50 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 07 Oct 2012 23:07:55 -0700 (PDT) From: Shawn Guo To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: imx6q: let users input debug uart port number Date: Mon, 8 Oct 2012 14:06:33 +0800 Message-Id: <1349676394-25704-1-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQkx5JQ09MahiuGfD5I56ySrPdLnpkk7EjXkSxR4aOmMOeWiIlfMZFI0fa61AEjwf2S+2nno X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org imx6q gets 5 uart ports in total. Different board design may choose different port as debug uart. For example, imx6q-sabresd uses UART1, imx6q-sabrelite uses UART2 and imx6q-arm2 uses UART4. Rather than bloating DEBUG_LL choice list with all these uart ports, the patch introduces DEBUG_IMX6Q_UART_PORT for users to input uart port number when DEBUG_IMX6Q_UART is selected inside DEBUG_LL choice. Signed-off-by: Shawn Guo --- arch/arm/Kconfig.debug | 26 +++++++++++++------------- arch/arm/include/debug/imx.S | 20 ++++++++++++++++---- arch/arm/mach-imx/lluart.c | 28 ++++++++++++++++++---------- arch/arm/mach-imx/mx6q.h | 4 ---- 4 files changed, 47 insertions(+), 31 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5566520..5dc7109 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -209,20 +209,12 @@ choice Say Y here if you want kernel low-level debugging support on i.MX50 or i.MX53. - config DEBUG_IMX6Q_UART2 - bool "i.MX6Q Debug UART2" + config DEBUG_IMX6Q_UART + bool "i.MX6Q Debug UART" depends on SOC_IMX6Q help Say Y here if you want kernel low-level debugging support - on i.MX6Q UART2. This is correct for e.g. the SabreLite - board. - - config DEBUG_IMX6Q_UART4 - bool "i.MX6Q Debug UART4" - depends on SOC_IMX6Q - help - Say Y here if you want kernel low-level debugging support - on i.MX6Q UART4. + on i.MX6Q. config DEBUG_MMP_UART2 bool "Kernel low-level debugging message via MMP UART2" @@ -409,6 +401,15 @@ choice endchoice +config DEBUG_IMX6Q_UART_PORT + int "i.MX6Q Debug UART Port (1-5)" if DEBUG_IMX6Q_UART + range 1 5 + default 1 + depends on SOC_IMX6Q + help + Choose UART port on which kernel low-level debug messages + should be output. + config DEBUG_LL_INCLUDE string default "debug/icedcc.S" if DEBUG_ICEDCC @@ -418,8 +419,7 @@ config DEBUG_LL_INCLUDE DEBUG_IMX31_IMX35_UART || \ DEBUG_IMX51_UART || \ DEBUG_IMX50_IMX53_UART ||\ - DEBUG_IMX6Q_UART2 || \ - DEBUG_IMX6Q_UART4 + DEBUG_IMX6Q_UART default "debug/highbank.S" if DEBUG_HIGHBANK_UART default "debug/mvebu.S" if DEBUG_MVEBU_UART default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART diff --git a/arch/arm/include/debug/imx.S b/arch/arm/include/debug/imx.S index 0b65d79..0c4e17d 100644 --- a/arch/arm/include/debug/imx.S +++ b/arch/arm/include/debug/imx.S @@ -10,6 +10,20 @@ * published by the Free Software Foundation. * */ +#define IMX6Q_UART1_BASE_ADDR 0x02020000 +#define IMX6Q_UART2_BASE_ADDR 0x021e8000 +#define IMX6Q_UART3_BASE_ADDR 0x021ec000 +#define IMX6Q_UART4_BASE_ADDR 0x021f0000 +#define IMX6Q_UART5_BASE_ADDR 0x021f4000 + +/* + * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion + * of IMX6Q_UART##n##_BASE_ADDR. + */ +#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR +#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n) +#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT) + #ifdef CONFIG_DEBUG_IMX1_UART #define UART_PADDR 0x00206000 #elif defined (CONFIG_DEBUG_IMX25_UART) @@ -22,10 +36,8 @@ #define UART_PADDR 0x73fbc000 #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) #define UART_PADDR 0x53fbc000 -#elif defined (CONFIG_DEBUG_IMX6Q_UART2) -#define UART_PADDR 0x021e8000 -#elif defined (CONFIG_DEBUG_IMX6Q_UART4) -#define UART_PADDR 0x021f0000 +#elif defined (CONFIG_DEBUG_IMX6Q_UART) +#define UART_PADDR IMX6Q_DEBUG_UART_BASE #endif /* diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c index 5f15103..2fdc9bf 100644 --- a/arch/arm/mach-imx/lluart.c +++ b/arch/arm/mach-imx/lluart.c @@ -17,17 +17,25 @@ #include "hardware.h" +#define IMX6Q_UART1_BASE_ADDR 0x02020000 +#define IMX6Q_UART2_BASE_ADDR 0x021e8000 +#define IMX6Q_UART3_BASE_ADDR 0x021ec000 +#define IMX6Q_UART4_BASE_ADDR 0x021f0000 +#define IMX6Q_UART5_BASE_ADDR 0x021f4000 + +/* + * IMX6Q_UART_BASE_ADDR is put in the middle to force the expansion + * of IMX6Q_UART##n##_BASE_ADDR. + */ +#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR +#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n) +#define IMX6Q_DEBUG_UART_BASE IMX6Q_UART_BASE(CONFIG_DEBUG_IMX6Q_UART_PORT) + static struct map_desc imx_lluart_desc = { -#ifdef CONFIG_DEBUG_IMX6Q_UART2 - .virtual = MX6Q_IO_P2V(MX6Q_UART2_BASE_ADDR), - .pfn = __phys_to_pfn(MX6Q_UART2_BASE_ADDR), - .length = MX6Q_UART2_SIZE, - .type = MT_DEVICE, -#endif -#ifdef CONFIG_DEBUG_IMX6Q_UART4 - .virtual = MX6Q_IO_P2V(MX6Q_UART4_BASE_ADDR), - .pfn = __phys_to_pfn(MX6Q_UART4_BASE_ADDR), - .length = MX6Q_UART4_SIZE, +#ifdef CONFIG_DEBUG_IMX6Q_UART + .virtual = IMX_IO_P2V(IMX6Q_DEBUG_UART_BASE), + .pfn = __phys_to_pfn(IMX6Q_DEBUG_UART_BASE), + .length = 0x4000, .type = MT_DEVICE, #endif }; diff --git a/arch/arm/mach-imx/mx6q.h b/arch/arm/mach-imx/mx6q.h index f7e7dba..19d3f54 100644 --- a/arch/arm/mach-imx/mx6q.h +++ b/arch/arm/mach-imx/mx6q.h @@ -27,9 +27,5 @@ #define MX6Q_CCM_SIZE 0x4000 #define MX6Q_ANATOP_BASE_ADDR 0x020c8000 #define MX6Q_ANATOP_SIZE 0x1000 -#define MX6Q_UART2_BASE_ADDR 0x021e8000 -#define MX6Q_UART2_SIZE 0x4000 -#define MX6Q_UART4_BASE_ADDR 0x021f0000 -#define MX6Q_UART4_SIZE 0x4000 #endif /* __MACH_MX6Q_H__ */