From patchwork Mon Oct 8 08:39:16 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 1564621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id D88ECDFFAD for ; Mon, 8 Oct 2012 08:47:57 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TL8xV-0004tX-Hn; Mon, 08 Oct 2012 08:45:06 +0000 Received: from mailout3.samsung.com ([203.254.224.33]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TL8tE-0001vA-Ma for linux-arm-kernel@lists.infradead.org; Mon, 08 Oct 2012 08:40:43 +0000 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MBK00J1IFZAC2S0@mailout3.samsung.com> for linux-arm-kernel@lists.infradead.org; Mon, 08 Oct 2012 17:40:39 +0900 (KST) X-AuditID: cbfee61b-b7f2b6d000000f14-c5-50729187250f Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 8C.51.03860.78192705; Mon, 08 Oct 2012 17:40:39 +0900 (KST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MBK0094QG1I1U90@mmp2.samsung.com> for linux-arm-kernel@lists.infradead.org; Mon, 08 Oct 2012 17:40:39 +0900 (KST) From: Tomasz Figa To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 16/16] Documentation: Update samsung-pinctrl device tree bindings documentation Date: Mon, 08 Oct 2012 10:39:16 +0200 Message-id: <1349685556-23718-17-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 1.7.10 In-reply-to: <1349685556-23718-1-git-send-email-t.figa@samsung.com> References: <1349685556-23718-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrPJMWRmVeSWpSXmKPExsVy+t9jQd32iUUBBos3aFhsenyN1YHRY/OS +gDGKC6blNSczLLUIn27BK6MZc0/WApmhlZsOZXSwLjVqYuRk0NCwERiwqQbzBC2mMSFe+vZ uhi5OIQEpjNKTD/eygaSEBLYzCSxcponiM0moCbxueERWFxEQENiStdjdhCbWWAyk8SxBeld jBwcwgKJEj0dliBhFgFViT1XW8BKeAWcJWYs/8gGsUte4un9PjCbEyh+8ud8VohVThJLLl1m mcDIu4CRYRWjaGpBckFxUnqukV5xYm5xaV66XnJ+7iZGsLefSe9gXNVgcYhRgINRiYf3o15R gBBrYllxZe4hRgkOZiUR3tR+oBBvSmJlVWpRfnxRaU5q8SFGaQ4WJXHeZo+UACGB9MSS1OzU 1ILUIpgsEwenVAPjlHxr2/exFx8fO2Sw3SupN+LcbJd1uxeGr/1T/t244ozUppqKH1/WJhms Wy25tLO1utr7/63jVw1l4tKL4q7EcleL7r34W7lrU5Bsl8ifPSbXs2S3nT1X6LGChc37+DuP inlyS9eXq54484PpRu1euZPskzIYHZaEvMmTS41OLNRapaCbKaerxFKckWioxVxUnAgAvuNw f/IBAAA= X-Spam-Note: CRM114 invocation failed X-Spam-Score: -9.0 (---------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-9.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.33 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -2.1 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kgene.kim@samsung.com, swarren@wwwdotorg.org, devicetree-discuss@lists.ozlabs.org, tomasz.figa@gmail.com, t.figa@samsung.com, kyungmin.park@samsung.com, linux-samsung-soc@vger.kernel.org, thomas.abraham@linaro.org, linus.walleij@linaro.org, m.szyprowski@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Signed-off-by: Tomasz Figa --- .../bindings/pinctrl/samsung-pinctrl.txt | 212 ++++++++++++++++++--- 1 file changed, 187 insertions(+), 25 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index 03dee50..6ebc946 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -13,8 +13,35 @@ Required Properties: - reg: Base address of the pin controller hardware module and length of the address space it occupies. -- interrupts: interrupt specifier for the controller. The format and value of - the interrupt specifier depends on the interrupt parent for the controller. +- Pin bank types: Pin bank nodes reference pin bank types by their phandles to + determine low level bank parameters such as bit field availability and widths. + There is no restriction for placement of such nodes. A bank type node must + contain following properties: + + - samsung,reg-names: names of registers specified in samsung,reg-params + property. Allowed register names are: + - "func" - function configuration register (GPxCON) + - "dat" - input/output value register (GPxDAT) + - "pud" - pull-up/-down control register (GPxPUD) + - "drv" - driver strength control register (GPxDRV) + - "conpdn" - power-down state control register (GPxCONPDN) + - "pudpdn" - power-down pull-up/-down control register (GPxPUDPDN) + - samsung,reg-params: register specifiers for registers named by + samsung,reg-names property. Each specifier contains two cells: + - first cell: offset in bytes from first register of the bank + - second cell: bits in register used for single pin. + +- Pin banks as child nodes: Pin banks of the controller are represented by child + nodes of the controller node. Bank name is taken from name of the node. Each + bank node must contain following properties: + + - gpio-controller: identifies the node as a gpio controller and pin bank. + - samsung,pctrl-offset: offset to pin control registers of the bank. + - samsung,pin-count: number of pins in the bank. + - samsung,bank-type: phandle to a node defining bank type. + - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO + binding is used, the amount of cells must be specified as 2. See generic + GPIO binding documentation for description of particular cells. - Pin mux/config groups as child nodes: The pin mux (selecting pin function mode) and pin config (pull up/down, driver strength) settings are represented @@ -72,16 +99,30 @@ used as system wakeup events. A. External GPIO Interrupts: For supporting external gpio interrupts, the following properties should be specified in the pin-controller device node. -- interrupt-controller: identifies the controller node as interrupt-parent. -- #interrupt-cells: the value of this property should be 2. - - First Cell: represents the external gpio interrupt number local to the - external gpio interrupt space of the controller. - - Second Cell: flags to identify the type of the interrupt - - 1 = rising edge triggered - - 2 = falling edge triggered - - 3 = rising and falling edge triggered - - 4 = high level triggered - - 8 = low level triggered + - samsung,geint-con: offset of first EXT_INTxx_CON register. + - samsung,geint-mask: offset of first EXT_INTxx_MASK register. + - samsung,geint-pend: offset of first EXT_INTxx_PEND register. + - samsung,svc: offset of EXT_INT_SERVICE register. + - interrupt-parent: phandle of the interrupt parent to which the external + GPIO interrupts are forwarded to. + - interrupts: interrupt specifier for the controller. The format and value of + the interrupt specifier depends on the interrupt parent for the controller. + + In addition, following properties must be present in node of every bank + of pins supporting GPIO interrupts: + + - interrupt-controller: identifies the controller node as interrupt-parent. + - samsung,eint-offset: offset of register related to this bank from first + CON/MASK/PEND register. + - #interrupt-cells: the value of this property should be 2. + - First Cell: represents the external gpio interrupt number local to the + external gpio interrupt space of the controller. + - Second Cell: flags to identify the type of the interrupt + - 1 = rising edge triggered + - 2 = falling edge triggered + - 3 = rising and falling edge triggered + - 4 = high level triggered + - 8 = low level triggered B. External Wakeup Interrupts: For supporting external wakeup interrupts, a child node representing the external wakeup interrupt controller should be @@ -94,7 +135,18 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a found on Samsung Exynos4210 SoC. - interrupt-parent: phandle of the interrupt parent to which the external wakeup interrupts are forwarded to. + - interrupts: interrupt used by multiplexed wakeup interrupts. + - samsung,weint-con: offset of first wake-up EXT_INTxx_CON register. + - samsung,weint-mask: offset of first wake-up EXT_INTxx_MASK register. + - samsung,weint-pend: offset of first wake-up EXT_INTxx_PEND register. + + In addition, following properties must be present in node of every bank + of pins supporting wake-up interrupts: + - interrupt-controller: identifies the node as interrupt-parent. + - samsung,wkup-eint: marks the bank as supporting wake-up interrupts. + - samsung,eint-offset: offset of register related to this bank from first + wake-up CON/MASK/PEND register. - #interrupt-cells: the value of this property should be 2 - First Cell: represents the external wakeup interrupt number local to the external wakeup interrupt space of the controller. @@ -105,17 +157,125 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a - 4 = high level triggered - 8 = low level triggered + Node of every bank of pins supporting direct wake-up interrupts (without + multiplexing) must contain following properties: + + - interrupt-parent: phandle of the interrupt parent to which the external + wakeup interrupts are forwarded to. + - interrupts: interrupts of the interrupt parent which are used for external + wakeup interrupts from pins of the bank, must contain interrupts for all + pins of the bank. + Aliases: All the pin controller nodes should be represented in the aliases node using the following format 'pinctrl{n}' where n is a unique number for the alias. +Example: Nodes for pin bank types: + + pinctrl-bank-types { + bank_off: bank-off { + samsung,reg-names = "func", "dat", "pud", + "drv", "conpdn", "pudpdn"; + samsung,reg-params = <0x00 4>, <0x04 1>, <0x08 2>, + <0x0C 2>, <0x10 2>, <0x14 2>; + }; + + bank_alive: bank-alive { + samsung,reg-names = "func", "dat", "pud", + "drv"; + samsung,reg-params = <0x00 4>, <0x04 1>, <0x08 2>, + <0x0C 2>; + }; + }; + +Example: A pin-controller node with pin banks: + + pinctrl_0: pinctrl@11400000 { + compatible = "samsung,pinctrl-exynos4210"; + reg = <0x11400000 0x1000>; + interrupts = <0 47 0>; + samsung,geint-con = <0x700>; + samsung,geint-mask = <0x900>; + samsung,geint-pend = <0xA00>; + samsung,svc = <0xB08>; + + /* ... */ + + /* Pin bank without external interrupts */ + gpy0: gpy0 { + gpio-controller; + samsung,pctl-offset = <0x120>; + samsung,pin-count = <6>; + samsung,bank-type = <&bank_off>; + #gpio-cells = <2>; + }; + + /* ... */ + + /* Pin bank with external GPIO interrupts */ + gpj0: gpj0 { + gpio-controller; + samsung,pctl-offset = <0x000>; + samsung,pin-count = <8>; + samsung,bank-type = <&bank_off>; + #gpio-cells = <2>; + + interrupt-controller; + samsung,eint-offset = <0x00>; + #interrupt-cells = <2>; + }; + + /* ... */ + + /* Pin bank with external direct wake-up interrupts */ + gpx0: gpx0 { + gpio-controller; + samsung,pctl-offset = <0xC00>; + samsung,pin-count = <8>; + samsung,bank-type = <&bank_alive>; + #gpio-cells = <2>; + + interrupt-controller; + samsung,wkup-eint; + interrupt-parent = <&gic>; + interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, + <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; + samsung,eint-offset = <0x00>; + #interrupt-cells = <2>; + }; + + /* ... */ + + /* Pin bank with external multiplexed wake-up interrupts */ + gpx2: gpx2 { + gpio-controller; + samsung,pctl-offset = <0xC40>; + samsung,pin-count = <8>; + samsung,bank-type = <&bank_alive>; + #gpio-cells = <2>; + + interrupt-controller; + samsung,wkup-eint; + samsung,eint-offset = <0x08>; + #interrupt-cells = <2>; + }; + + /* ... */ + }; + Example 1: A pin-controller node with pin groups. pinctrl_0: pinctrl@11400000 { compatible = "samsung,pinctrl-exynos4210"; reg = <0x11400000 0x1000>; interrupts = <0 47 0>; + samsung,geint-con = <0x700>; + samsung,geint-mask = <0x900>; + samsung,geint-pend = <0xA00>; + samsung,svc = <0xB08>; + + /* ... */ uart0_data: uart0-data { samsung,pins = "gpa0-0", "gpa0-1"; @@ -158,20 +318,21 @@ Example 2: A pin-controller node with external wakeup interrupt controller node. pinctrl_1: pinctrl@11000000 { compatible = "samsung,pinctrl-exynos4210"; reg = <0x11000000 0x1000>; - interrupts = <0 46 0>; - interrupt-controller; - #interrupt-cells = <2>; + interrupts = <0 46 0> + samsung,geint-con = <0x700>; + samsung,geint-mask = <0x900>; + samsung,geint-pend = <0xA00>; + samsung,svc = <0xB08>; - wakup_eint: wakeup-interrupt-controller { + /* ... */ + + wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, - <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, - <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, - <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>, - <0 32 0>; + interrupts = <0 32 0>; + samsung,weint-con = <0xE00>; + samsung,weint-mask = <0xF00>; + samsung,weint-pend = <0xF40>; }; }; @@ -190,7 +351,8 @@ Example 4: Set up the default pin state for uart controller. static int s3c24xx_serial_probe(struct platform_device *pdev) { struct pinctrl *pinctrl; - ... - ... + + /* ... */ + pinctrl = devm_pinctrl_get_select_default(&pdev->dev); }