diff mbox

[01/16] ARM: dts: exynos4210: Replace legacy GPIO bank nodes with pinctrl bank nodes

Message ID 1349685556-23718-2-git-send-email-t.figa@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

Tomasz Figa Oct. 8, 2012, 8:39 a.m. UTC 
Seuqential patches from this series introduce SoC-specific data parsing
from device tree.

This patch removes legacy GPIO bank nodes from exynos4210.dtsi and
replaces them with nodes and properties required for these patches.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
---
 arch/arm/boot/dts/exynos4210-pinctrl-banks.dtsi | 459 ++++++++++++++++++++++++
 arch/arm/boot/dts/exynos4210-pinctrl.dtsi       |   2 +
 arch/arm/boot/dts/exynos4210.dtsi               | 254 +------------
 3 files changed, 474 insertions(+), 241 deletions(-)
 create mode 100644 arch/arm/boot/dts/exynos4210-pinctrl-banks.dtsi

Comments

Linus Walleij Oct. 10, 2012, 7:26 a.m. UTC | #1 
On Mon, Oct 8, 2012 at 10:39 AM, Tomasz Figa <t.figa@samsung.com> wrote:

> Seuqential patches from this series introduce SoC-specific data parsing
> from device tree.
>
> This patch removes legacy GPIO bank nodes from exynos4210.dtsi and
> replaces them with nodes and properties required for these patches.

So to be clear:

> +       pinctrl-bank-types {
> +               bank_off: bank-off {
> +                       samsung,reg-names = "func", "dat", "pud",
> +                                               "drv", "conpdn", "pudpdn";
> +                       samsung,reg-params = <0x00 4>, <0x04 1>, <0x08 2>,
> +                                               <0x0C 2>, <0x10 2>, <0x14 2>;
> +               };

This is starting to look like a firmware language, I have mixed
feelings about this. Shall this be read:

"Poke 4 into 0x00, poke 1 into 0x04, poke 2 into 0x08" etc?

We really need to discuss this, Grant has already NACK:ed
such approaches once.

If you're still going to do this, it is mandatory
to NOT use magic hex numbers anymore, because Stephen has
merged preprocessor support to the DTC compiler so you
can use #defined macros.

See commit:
cd296721a9645f9f28800a072490fa15458d1fb7

> +       pinctrl@11400000 {
> +               gpa0: gpa0 {
> +                       gpio-controller;
> +                       samsung,pctl-offset = <0x000>;
> +                       samsung,pin-count = <8>;
> +                       samsung,bank-type = <&bank_off>;
> +                       #gpio-cells = <2>;

This part is OK.

> +
> +                       interrupt-controller;
> +                       samsung,eint-offset = <0x00>;

This property is *NOT* OK. IMHO the driver should know these
offsets, not the device tree. The driver only needs the offset to
the register range, what registers there are and their names
should be #defined.

> +                       #interrupt-cells = <2>;
> +               };

Yours,
Linus Walleij
Tomasz Figa Oct. 10, 2012, 8:20 a.m. UTC | #2 
On Wednesday 10 of October 2012 09:26:51 Linus Walleij wrote:
> On Mon, Oct 8, 2012 at 10:39 AM, Tomasz Figa <t.figa@samsung.com> wrote:
> > Seuqential patches from this series introduce SoC-specific data parsing
> > from device tree.
> > 
> > This patch removes legacy GPIO bank nodes from exynos4210.dtsi and
> > replaces them with nodes and properties required for these patches.
> 
> So to be clear:
> > +       pinctrl-bank-types {
> > +               bank_off: bank-off {
> > +                       samsung,reg-names = "func", "dat", "pud",
> > +                                               "drv", "conpdn",
> > "pudpdn"; +                       samsung,reg-params = <0x00 4>, <0x04
> > 1>, <0x08 2>, +                                               <0x0C
> > 2>, <0x10 2>, <0x14 2>; +               };
> 
> This is starting to look like a firmware language, I have mixed
> feelings about this. Shall this be read:
> 
> "Poke 4 into 0x00, poke 1 into 0x04, poke 2 into 0x08" etc?

I'm not sure if I understood you correctly, so let me explain how this 
works.

Each specifier defines register offset inside bank registers and how many 
bits are used for one pin in this register to specify configuration value.

E.g. func register is available at offset 0x00 and pin 0 occupies bits 0-3, 
pin 1 bit 4-7, etc.

> 
> We really need to discuss this, Grant has already NACK:ed
> such approaches once.
> 
> If you're still going to do this, it is mandatory
> to NOT use magic hex numbers anymore, because Stephen has
> merged preprocessor support to the DTC compiler so you
> can use #defined macros.
> 
> See commit:
> cd296721a9645f9f28800a072490fa15458d1fb7

That's definitely nice. I have seen the work going on this before, but 
haven't followed it recently. Good to know that now it can be used.
 
> > +       pinctrl@11400000 {
> > +               gpa0: gpa0 {
> > +                       gpio-controller;
> > +                       samsung,pctl-offset = <0x000>;
> > +                       samsung,pin-count = <8>;
> > +                       samsung,bank-type = <&bank_off>;
> > +                       #gpio-cells = <2>;
> 
> This part is OK.
> 
> > +
> > +                       interrupt-controller;
> > +                       samsung,eint-offset = <0x00>;
> 
> This property is *NOT* OK. IMHO the driver should know these
> offsets, not the device tree. The driver only needs the offset to
> the register range, what registers there are and their names
> should be #defined.

This is an offset inside of EINT register group. EINT registers are 
organized in groups as following:

EINT_CON_0
EINT_CON_1
...
EINT_CON_N

...

EINT_MASK_0
EINT_MASK_1
...
EINT_MASK_N

...

EINT_PEND_0
EINT_PEND_1
...
EINT_PEND_N

With arbitrary order of particular groups, arbitrary space between groups 
and arbitrary mapping of particular registers to pin banks, although the 
mapping is the same for all groups of registers, that's why there is only 
one eint-offset property. Also holes (reserved/unused registers) inside 
groups might exist.

So if we want to access EINT_MASK register of bank A0 (of pinctrl 0), we 
must construct the address as following:

eint_mask_a0 = pinctrl_0_base + pinctrl_0_geint_mask + bank_a0_eint_offset

Best regards,
Stephen Warren Oct. 10, 2012, 4:27 p.m. UTC | #3 
On 10/10/2012 01:26 AM, Linus Walleij wrote:
> On Mon, Oct 8, 2012 at 10:39 AM, Tomasz Figa <t.figa@samsung.com> wrote:
> 
>> Seuqential patches from this series introduce SoC-specific data parsing
>> from device tree.
>>
>> This patch removes legacy GPIO bank nodes from exynos4210.dtsi and
>> replaces them with nodes and properties required for these patches.
> 
> So to be clear:
> 
>> +       pinctrl-bank-types {
>> +               bank_off: bank-off {
>> +                       samsung,reg-names = "func", "dat", "pud",
>> +                                               "drv", "conpdn", "pudpdn";
>> +                       samsung,reg-params = <0x00 4>, <0x04 1>, <0x08 2>,
>> +                                               <0x0C 2>, <0x10 2>, <0x14 2>;
>> +               };
> 
> This is starting to look like a firmware language, I have mixed
> feelings about this. Shall this be read:
> 
> "Poke 4 into 0x00, poke 1 into 0x04, poke 2 into 0x08" etc?
> 
> We really need to discuss this, Grant has already NACK:ed
> such approaches once.

Well, I don't think he NACK'd Tony Lindgren's generic pinctrl driver,
which is doing this exact same thing. I did raise the same point about
Tony's driver when he posted it, but nobody seemed inclined to NACK it
based on that at the time, IIRC...

BTW, the idea here is IIRC to create a generic Samsung pinctrl driver
that works across N different Samsung SoCs, each with different register
layout, without having to encode the register layout into tables in the
kernel.

> If you're still going to do this, it is mandatory
> to NOT use magic hex numbers anymore, because Stephen has
> merged preprocessor support to the DTC compiler so you
> can use #defined macros.
> 
> See commit:
> cd296721a9645f9f28800a072490fa15458d1fb7

That feature isn't enabled yet. While dtc has been modified to be able
to accept input that's been generated/processed by cpp, there is still
ongoing discussion about how/whether to actually enable *.dts to use
that feature.
Tony Lindgren Oct. 10, 2012, 6:12 p.m. UTC | #4 
* Stephen Warren <swarren@wwwdotorg.org> [121010 09:36]:
> On 10/10/2012 01:26 AM, Linus Walleij wrote:
> > On Mon, Oct 8, 2012 at 10:39 AM, Tomasz Figa <t.figa@samsung.com> wrote:
> > 
> >> Seuqential patches from this series introduce SoC-specific data parsing
> >> from device tree.
> >>
> >> This patch removes legacy GPIO bank nodes from exynos4210.dtsi and
> >> replaces them with nodes and properties required for these patches.
> > 
> > So to be clear:
> > 
> >> +       pinctrl-bank-types {
> >> +               bank_off: bank-off {
> >> +                       samsung,reg-names = "func", "dat", "pud",
> >> +                                               "drv", "conpdn", "pudpdn";
> >> +                       samsung,reg-params = <0x00 4>, <0x04 1>, <0x08 2>,
> >> +                                               <0x0C 2>, <0x10 2>, <0x14 2>;
> >> +               };
> > 
> > This is starting to look like a firmware language, I have mixed
> > feelings about this. Shall this be read:
> > 
> > "Poke 4 into 0x00, poke 1 into 0x04, poke 2 into 0x08" etc?
> > 
> > We really need to discuss this, Grant has already NACK:ed
> > such approaches once.
> 
> Well, I don't think he NACK'd Tony Lindgren's generic pinctrl driver,
> which is doing this exact same thing. I did raise the same point about
> Tony's driver when he posted it, but nobody seemed inclined to NACK it
> based on that at the time, IIRC...

To summarize, using reg value pairs in DT makes sense if the amount
of data is huge. Otherwise we'll be describing indidual hardware bits
as properties in DT, or have to have huge amounts of static data in
the kernel.

Where it does not make sense is if there's a sequence of reads
and writes with test loops in between.. But that's does not look
to be the case here.

The reg value pairs will be readable when the DT preprocessing is
available, and that allows the values to be orred together while
DT properties don't. The alternative is to describe hardware register
bits as DT properties, which is very bloated.

But considering all this.. Are the samsung,reg-names really needed
by the kernel?

The pinctrl named modes actually are more generic from the pinctrl
client driver point of view as you can set up multiple states for
runtime PM.
 
> BTW, the idea here is IIRC to create a generic Samsung pinctrl driver
> that works across N different Samsung SoCs, each with different register
> layout, without having to encode the register layout into tables in the
> kernel.
> 
> > If you're still going to do this, it is mandatory
> > to NOT use magic hex numbers anymore, because Stephen has
> > merged preprocessor support to the DTC compiler so you
> > can use #defined macros.
> > 
> > See commit:
> > cd296721a9645f9f28800a072490fa15458d1fb7
> 
> That feature isn't enabled yet. While dtc has been modified to be able
> to accept input that's been generated/processed by cpp, there is still
> ongoing discussion about how/whether to actually enable *.dts to use
> that feature.

Hey finally! That's good news.

Regards,

Tony
Tomasz Figa Oct. 10, 2012, 6:22 p.m. UTC | #5 
Dnia ?roda, 10 pa?dziernika 2012 11:12:53 Tony Lindgren pisze:
> * Stephen Warren <swarren@wwwdotorg.org> [121010 09:36]:
> > On 10/10/2012 01:26 AM, Linus Walleij wrote:
> > > On Mon, Oct 8, 2012 at 10:39 AM, Tomasz Figa <t.figa@samsung.com> 
wrote:
> > >> Seuqential patches from this series introduce SoC-specific data 
parsing
> > >> from device tree.
> > >> 
> > >> This patch removes legacy GPIO bank nodes from exynos4210.dtsi and
> > >> replaces them with nodes and properties required for these patches.
> > > 
> > > So to be clear:
> > >> +       pinctrl-bank-types {
> > >> +               bank_off: bank-off {
> > >> +                       samsung,reg-names = "func", "dat", "pud",
> > >> +                                               "drv", "conpdn",
> > >> "pudpdn";
> > >> +                       samsung,reg-params = <0x00 4>, <0x04 1>, 
<0x08
> > >> 2>,
> > >> +                                               <0x0C 2>, <0x10 2>,
> > >> <0x14 2>; +               };
> > > 
> > > This is starting to look like a firmware language, I have mixed
> > > feelings about this. Shall this be read:
> > > 
> > > "Poke 4 into 0x00, poke 1 into 0x04, poke 2 into 0x08" etc?
> > > 
> > > We really need to discuss this, Grant has already NACK:ed
> > > such approaches once.
> > 
> > Well, I don't think he NACK'd Tony Lindgren's generic pinctrl driver,
> > which is doing this exact same thing. I did raise the same point about
> > Tony's driver when he posted it, but nobody seemed inclined to NACK it
> > based on that at the time, IIRC...
> 
> To summarize, using reg value pairs in DT makes sense if the amount
> of data is huge. Otherwise we'll be describing indidual hardware bits
> as properties in DT, or have to have huge amounts of static data in
> the kernel.
> 
> Where it does not make sense is if there's a sequence of reads
> and writes with test loops in between.. But that's does not look
> to be the case here.
> 
> The reg value pairs will be readable when the DT preprocessing is
> available, and that allows the values to be orred together while
> DT properties don't. The alternative is to describe hardware register
> bits as DT properties, which is very bloated.
> 
> But considering all this.. Are the samsung,reg-names really needed
> by the kernel?

They are used to specify which registers are defined in reg-params property 
and in which order. Most of the registers are not mandatory and this is 
needed to be able to specify only those that are present. At least I 
couldn't think of a better solution for this. Do you have some suggestions?

Best regards,
Tomasz Figa
Tomasz Figa Oct. 10, 2012, 6:26 p.m. UTC | #6 
Dnia ?roda, 10 pa?dziernika 2012 11:12:53 Tony Lindgren pisze:
> * Stephen Warren <swarren@wwwdotorg.org> [121010 09:36]:
> > On 10/10/2012 01:26 AM, Linus Walleij wrote:
> > > On Mon, Oct 8, 2012 at 10:39 AM, Tomasz Figa <t.figa@samsung.com> 
wrote:
> > >> Seuqential patches from this series introduce SoC-specific data
> > >> parsing
> > >> from device tree.
> > >> 
> > >> This patch removes legacy GPIO bank nodes from exynos4210.dtsi and
> > >> replaces them with nodes and properties required for these patches.
> > > 
> > > So to be clear:
> > >> +       pinctrl-bank-types {
> > >> +               bank_off: bank-off {
> > >> +                       samsung,reg-names = "func", "dat", "pud",
> > >> +                                               "drv", "conpdn",
> > >> "pudpdn"; +                       samsung,reg-params = <0x00 4>,
> > >> <0x04 1>, <0x08 2>, +                                              
> > >> <0x0C 2>, <0x10 2>, <0x14 2>; +               };
> > > 
> > > This is starting to look like a firmware language, I have mixed
> > > feelings about this. Shall this be read:
> > > 
> > > "Poke 4 into 0x00, poke 1 into 0x04, poke 2 into 0x08" etc?
> > > 
> > > We really need to discuss this, Grant has already NACK:ed
> > > such approaches once.
> > 
> > Well, I don't think he NACK'd Tony Lindgren's generic pinctrl driver,
> > which is doing this exact same thing. I did raise the same point about
> > Tony's driver when he posted it, but nobody seemed inclined to NACK it
> > based on that at the time, IIRC...
> 
> To summarize, using reg value pairs in DT makes sense if the amount
> of data is huge. Otherwise we'll be describing indidual hardware bits
> as properties in DT, or have to have huge amounts of static data in
> the kernel.
> 
> Where it does not make sense is if there's a sequence of reads
> and writes with test loops in between.. But that's does not look
> to be the case here.
> 
> The reg value pairs will be readable when the DT preprocessing is
> available, and that allows the values to be orred together while
> DT properties don't. The alternative is to describe hardware register
> bits as DT properties, which is very bloated.
> 
> But considering all this.. Are the samsung,reg-names really needed
> by the kernel?

They are used to specify which registers are defined in reg-params property 
and in which order. Most of the registers are not mandatory and this is 
needed to be able to specify only those that are present. At least I 
couldn't think of a better solution for this. Do you have some suggestions?
 
Best regards,
Tomasz Figa
diff mbox

Patch

diff --git a/arch/arm/boot/dts/exynos4210-pinctrl-banks.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl-banks.dtsi
new file mode 100644
index 0000000..ec91f40
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210-pinctrl-banks.dtsi
@@ -0,0 +1,459 @@ 
+/*
+ * Samsung's Exynos4210 SoC pinctrl banks device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * Samsung's Exynos4210 SoC pin banks are listed as device tree nodes
+ * in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+	pinctrl-bank-types {
+		bank_off: bank-off {
+			samsung,reg-names = "func", "dat", "pud",
+						"drv", "conpdn", "pudpdn";
+			samsung,reg-params = <0x00 4>, <0x04 1>, <0x08 2>,
+						<0x0C 2>, <0x10 2>, <0x14 2>;
+		};
+
+		bank_alive: bank-alive {
+			samsung,reg-names = "func", "dat", "pud",
+						"drv";
+			samsung,reg-params = <0x00 4>, <0x04 1>, <0x08 2>,
+						<0x0C 2>;
+		};
+	};
+
+	pinctrl@11400000 {
+		gpa0: gpa0 {
+			gpio-controller;
+			samsung,pctl-offset = <0x000>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x00>;
+			#interrupt-cells = <2>;
+		};
+
+		gpa1: gpa1 {
+			gpio-controller;
+			samsung,pctl-offset = <0x020>;
+			samsung,pin-count = <6>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x04>;
+			#interrupt-cells = <2>;
+		};
+
+		gpb: gpb {
+			gpio-controller;
+			samsung,pctl-offset = <0x040>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x08>;
+			#interrupt-cells = <2>;
+		};
+
+		gpc0: gpc0 {
+			gpio-controller;
+			samsung,pctl-offset = <0x060>;
+			samsung,pin-count = <5>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x0C>;
+			#interrupt-cells = <2>;
+		};
+
+		gpc1: gpc1 {
+			gpio-controller;
+			samsung,pctl-offset = <0x080>;
+			samsung,pin-count = <5>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x10>;
+			#interrupt-cells = <2>;
+		};
+
+		gpd0: gpd0 {
+			gpio-controller;
+			samsung,pctl-offset = <0x0A0>;
+			samsung,pin-count = <4>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x14>;
+			#interrupt-cells = <2>;
+		};
+
+		gpd1: gpd1 {
+			gpio-controller;
+			samsung,pctl-offset = <0x0C0>;
+			samsung,pin-count = <4>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x18>;
+			#interrupt-cells = <2>;
+		};
+
+		gpe0: gpe0 {
+			gpio-controller;
+			samsung,pctl-offset = <0x0E0>;
+			samsung,pin-count = <5>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x1C>;
+			#interrupt-cells = <2>;
+		};
+
+		gpe1: gpe1 {
+			gpio-controller;
+			samsung,pctl-offset = <0x100>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x20>;
+			#interrupt-cells = <2>;
+		};
+
+		gpe2: gpe2 {
+			gpio-controller;
+			samsung,pctl-offset = <0x120>;
+			samsung,pin-count = <6>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x24>;
+			#interrupt-cells = <2>;
+		};
+
+		gpe3: gpe3 {
+			gpio-controller;
+			samsung,pctl-offset = <0x140>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x28>;
+			#interrupt-cells = <2>;
+		};
+
+		gpe4: gpe4 {
+			gpio-controller;
+			samsung,pctl-offset = <0x160>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x2C>;
+			#interrupt-cells = <2>;
+		};
+
+		gpf0: gpf0 {
+			gpio-controller;
+			samsung,pctl-offset = <0x180>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x30>;
+			#interrupt-cells = <2>;
+		};
+
+		gpf1: gpf1 {
+			gpio-controller;
+			samsung,pctl-offset = <0x1A0>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x34>;
+			#interrupt-cells = <2>;
+		};
+
+		gpf2: gpf2 {
+			gpio-controller;
+			samsung,pctl-offset = <0x1C0>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x38>;
+			#interrupt-cells = <2>;
+		};
+
+		gpf3: gpf3 {
+			gpio-controller;
+			samsung,pctl-offset = <0x1E0>;
+			samsung,pin-count = <6>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x3C>;
+			#interrupt-cells = <2>;
+		};
+	};
+
+	pinctrl@11000000 {
+		gpj0: gpj0 {
+			gpio-controller;
+			samsung,pctl-offset = <0x000>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x00>;
+			#interrupt-cells = <2>;
+		};
+
+		gpj1: gpj1 {
+			gpio-controller;
+			samsung,pctl-offset = <0x020>;
+			samsung,pin-count = <5>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x04>;
+			#interrupt-cells = <2>;
+		};
+
+		gpk0: gpk0 {
+			gpio-controller;
+			samsung,pctl-offset = <0x040>;
+			samsung,pin-count = <7>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x08>;
+			#interrupt-cells = <2>;
+		};
+
+		gpk1: gpk1 {
+			gpio-controller;
+			samsung,pctl-offset = <0x060>;
+			samsung,pin-count = <7>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x0C>;
+			#interrupt-cells = <2>;
+		};
+
+		gpk2: gpk2 {
+			gpio-controller;
+			samsung,pctl-offset = <0x080>;
+			samsung,pin-count = <7>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x10>;
+			#interrupt-cells = <2>;
+		};
+
+		gpk3: gpk3 {
+			gpio-controller;
+			samsung,pctl-offset = <0x0A0>;
+			samsung,pin-count = <7>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x14>;
+			#interrupt-cells = <2>;
+		};
+
+		gpl0: gpl0 {
+			gpio-controller;
+			samsung,pctl-offset = <0x0C0>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x18>;
+			#interrupt-cells = <2>;
+		};
+
+		gpl1: gpl1 {
+			gpio-controller;
+			samsung,pctl-offset = <0x0E0>;
+			samsung,pin-count = <3>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x1C>;
+			#interrupt-cells = <2>;
+		};
+
+		gpl2: gpl2 {
+			gpio-controller;
+			samsung,pctl-offset = <0x100>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,eint-offset = <0x20>;
+			#interrupt-cells = <2>;
+		};
+
+		gpy0: gpy0 {
+			gpio-controller;
+			samsung,pctl-offset = <0x120>;
+			samsung,pin-count = <6>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+		};
+
+		gpy1: gpy1 {
+			gpio-controller;
+			samsung,pctl-offset = <0x140>;
+			samsung,pin-count = <4>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+		};
+
+		gpy2: gpy2 {
+			gpio-controller;
+			samsung,pctl-offset = <0x160>;
+			samsung,pin-count = <6>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+		};
+
+		gpy3: gpy3 {
+			gpio-controller;
+			samsung,pctl-offset = <0x180>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+		};
+
+		gpy4: gpy4 {
+			gpio-controller;
+			samsung,pctl-offset = <0x1A0>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+		};
+
+		gpy5: gpy5 {
+			gpio-controller;
+			samsung,pctl-offset = <0x1C0>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+		};
+
+		gpy6: gpy6 {
+			gpio-controller;
+			samsung,pctl-offset = <0x1E0>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+		};
+
+		gpx0: gpx0 {
+			gpio-controller;
+			samsung,pctl-offset = <0xC00>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_alive>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,wkup-eint;
+			interrupt-parent = <&gic>;
+			interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
+				     <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
+			samsung,eint-offset = <0x00>;
+			#interrupt-cells = <2>;
+		};
+
+		gpx1: gpx1 {
+			gpio-controller;
+			samsung,pctl-offset = <0xC20>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_alive>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,wkup-eint;
+			interrupt-parent = <&gic>;
+			interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
+				     <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
+			samsung,eint-offset = <0x04>;
+			#interrupt-cells = <2>;
+		};
+
+		gpx2: gpx2 {
+			gpio-controller;
+			samsung,pctl-offset = <0xC40>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_alive>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,wkup-eint;
+			samsung,eint-offset = <0x08>;
+			#interrupt-cells = <2>;
+		};
+
+		gpx3: gpx3 {
+			gpio-controller;
+			samsung,pctl-offset = <0xC60>;
+			samsung,pin-count = <8>;
+			samsung,bank-type = <&bank_alive>;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			samsung,wkup-eint;
+			samsung,eint-offset = <0x0C>;
+			#interrupt-cells = <2>;
+		};
+	};
+
+	pinctrl@03860000 {
+		gpz: gpz {
+			gpio-controller;
+			samsung,pctl-offset = <0x000>;
+			samsung,pin-count = <7>;
+			samsung,bank-type = <&bank_off>;
+			#gpio-cells = <2>;
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
index b12cf27..94846d5 100644
--- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
@@ -14,6 +14,8 @@ 
  * published by the Free Software Foundation.
 */
 
+/include/ "exynos4210-pinctrl-banks.dtsi"
+
 / {
 	pinctrl@11400000 {
 		uart0_data: uart0-data {
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 214c557..7f32a51 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -46,27 +46,28 @@ 
 		compatible = "samsung,pinctrl-exynos4210";
 		reg = <0x11400000 0x1000>;
 		interrupts = <0 47 0>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
+		samsung,geint-con = <0x700>;
+		samsung,geint-mask = <0x900>;
+		samsung,geint-pend = <0xA00>;
+		samsung,svc = <0xB08>;
 	};
 
 	pinctrl_1: pinctrl@11000000 {
 		compatible = "samsung,pinctrl-exynos4210";
 		reg = <0x11000000 0x1000>;
 		interrupts = <0 46 0>;
-		interrupt-controller;
-		#interrupt-cells = <2>;
+		samsung,geint-con = <0x700>;
+		samsung,geint-mask = <0x900>;
+		samsung,geint-pend = <0xA00>;
+		samsung,svc = <0xB08>;
 
-		wakup_eint: wakeup-interrupt-controller {
+		wakeup-interrupt-controller {
 			compatible = "samsung,exynos4210-wakeup-eint";
 			interrupt-parent = <&gic>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
-				     <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
-				     <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
-				     <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>,
-				     <0 32 0>;
+			interrupts = <0 32 0>;
+			samsung,weint-con = <0xE00>;
+			samsung,weint-mask = <0xF00>;
+			samsung,weint-pend = <0xF40>;
 		};
 	};
 
@@ -74,233 +75,4 @@ 
 		compatible = "samsung,pinctrl-exynos4210";
 		reg = <0x03860000 0x1000>;
 	};
-
-	gpio-controllers {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		gpio-controller;
-		ranges;
-
-		gpa0: gpio-controller@11400000 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400000 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpa1: gpio-controller@11400020 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400020 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpb: gpio-controller@11400040 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400040 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpc0: gpio-controller@11400060 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400060 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpc1: gpio-controller@11400080 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400080 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpd0: gpio-controller@114000A0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114000A0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpd1: gpio-controller@114000C0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114000C0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpe0: gpio-controller@114000E0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114000E0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpe1: gpio-controller@11400100 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400100 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpe2: gpio-controller@11400120 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400120 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpe3: gpio-controller@11400140 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400140 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpe4: gpio-controller@11400160 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400160 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpf0: gpio-controller@11400180 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400180 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpf1: gpio-controller@114001A0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114001A0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpf2: gpio-controller@114001C0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114001C0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpf3: gpio-controller@114001E0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114001E0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpj0: gpio-controller@11000000 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000000 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpj1: gpio-controller@11000020 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000020 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpk0: gpio-controller@11000040 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000040 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpk1: gpio-controller@11000060 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000060 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpk2: gpio-controller@11000080 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000080 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpk3: gpio-controller@110000A0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x110000A0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpl0: gpio-controller@110000C0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x110000C0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpl1: gpio-controller@110000E0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x110000E0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpl2: gpio-controller@11000100 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000100 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy0: gpio-controller@11000120 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000120 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy1: gpio-controller@11000140 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000140 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy2: gpio-controller@11000160 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000160 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy3: gpio-controller@11000180 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000180 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy4: gpio-controller@110001A0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x110001A0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy5: gpio-controller@110001C0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x110001C0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy6: gpio-controller@110001E0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x110001E0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpx0: gpio-controller@11000C00 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000C00 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpx1: gpio-controller@11000C20 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000C20 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpx2: gpio-controller@11000C40 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000C40 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpx3: gpio-controller@11000C60 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000C60 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpz: gpio-controller@03860000 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x03860000 0x20>;
-			#gpio-cells = <4>;
-		};
-	};
 };