From patchwork Wed Oct 10 21:56:43 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christopher Kenna X-Patchwork-Id: 1575851 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 5AA0CDFB34 for ; Wed, 10 Oct 2012 21:58:47 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TM4H6-0003Sb-4U; Wed, 10 Oct 2012 21:57:08 +0000 Received: from mail-yh0-f49.google.com ([209.85.213.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TM4H1-0003SE-Nf for linux-arm-kernel@lists.infradead.org; Wed, 10 Oct 2012 21:57:04 +0000 Received: by mail-yh0-f49.google.com with SMTP id j52so290592yhj.36 for ; Wed, 10 Oct 2012 14:57:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=nzRQtIVYpLlSBLetVYk4kQ3PQ7rkR24xMfDgMMtSCsc=; b=Hrzs5CldP9ARNx4ud6mQiKBHlukBNnvz+74PU2CTHG+ZXyKdZFcOEJQQoscYoThK8z 5lTgJjs853j/9sg6oxfmEOlxTDD/vHYCmaX2dTUFNty1RT96faKDGyqTfewKJrDa79Cq N2m6NVNuMDjRcyxvLH5uaApD9I17lqzfeTXcx6XrFSDvaNImlpYGSyAIZpwtdl+To7fv YFOihAZderk+YUc34N6UP2ttuo/PjxrNQsR4+bdEdZHN8B5S7c7KsGO2rXxbDmZwJ//z UeKVbxyosWpa8dprIHmKcZF4aMdjnUiWt9cpvUOPsF92WnyTb91KZTezxiI5F3SIoyJB farA== Received: by 10.236.85.78 with SMTP id t54mr11254567yhe.48.1349906221563; Wed, 10 Oct 2012 14:57:01 -0700 (PDT) Received: from pound.cs.unc.edu (pound.cs.unc.edu. [152.2.142.84]) by mx.google.com with ESMTPS id g2sm2449117yhj.9.2012.10.10.14.57.00 (version=SSLv3 cipher=OTHER); Wed, 10 Oct 2012 14:57:01 -0700 (PDT) From: Christopher Kenna To: linux@arm.linux.org.uk Subject: [PATCH] Add forgotten mask in cache way unlock for PL310. Date: Wed, 10 Oct 2012 17:56:43 -0400 Message-Id: <1349906203-7839-1-git-send-email-cjk@cs.unc.edu> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQnfM5LDJvEM/VzPQ6ejrdDHOhDlPaS3ppYs+uNsz37cea04lZxkzTxbo3IXMWeYsmpe8gG8 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.8 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.8 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.213.49 listed in list.dnswl.org] 0.8 SPF_NEUTRAL SPF: sender does not match SPF record (neutral) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Christopher Kenna , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The part number should be masked out of the cache ID when detecting if the cache controller is a PL310. Since this is done elsewhere, add a macro for brevity. Tested on a PandaBoard ES. Signed-off-by: Christopher Kenna --- arch/arm/mm/cache-l2x0.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 8a97e64..bdf2f66 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -27,6 +27,7 @@ #include #define CACHE_LINE_SIZE 32 +#define CACHE_ID_PART(id) ((id) & L2X0_CACHE_ID_PART_MASK) static void __iomem *l2x0_base; static DEFINE_RAW_SPINLOCK(l2x0_lock); @@ -292,7 +293,7 @@ static void l2x0_unlock(u32 cache_id) int lockregs; int i; - if (cache_id == L2X0_CACHE_ID_PART_L310) + if (CACHE_ID_PART(cache_id) == L2X0_CACHE_ID_PART_L310) lockregs = 8; else /* L210 and unknown types */ @@ -323,7 +324,7 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask) aux |= aux_val; /* Determine the number of ways */ - switch (cache_id & L2X0_CACHE_ID_PART_MASK) { + switch (CACHE_ID_PART(cache_id)) { case L2X0_CACHE_ID_PART_L310: if (aux & (1 << 16)) ways = 16;