From patchwork Thu Oct 11 08:11:08 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 1581321 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 6E38FDFABE for ; Thu, 11 Oct 2012 08:14:46 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TMDsr-0006wn-A3; Thu, 11 Oct 2012 08:12:45 +0000 Received: from mailout2.samsung.com ([203.254.224.25]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TMDs1-0006eQ-FK for linux-arm-kernel@lists.infradead.org; Thu, 11 Oct 2012 08:11:56 +0000 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MBP005P8YRAMOI0@mailout2.samsung.com> for linux-arm-kernel@lists.infradead.org; Thu, 11 Oct 2012 17:11:43 +0900 (KST) X-AuditID: cbfee61b-b7f2b6d000000f14-2a-50767f3e7216 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 24.B5.03860.E3F76705; Thu, 11 Oct 2012 17:11:43 +0900 (KST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MBP005FVYR04E50@mmp1.samsung.com> for linux-arm-kernel@lists.infradead.org; Thu, 11 Oct 2012 17:11:42 +0900 (KST) From: Tomasz Figa To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 02/15] pinctrl: samsung: Do not pass gpio_chip to pin_to_reg_bank Date: Thu, 11 Oct 2012 10:11:08 +0200 Message-id: <1349943081-27939-3-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 1.7.10 In-reply-to: <1349943081-27939-1-git-send-email-t.figa@samsung.com> References: <1349943081-27939-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrEJMWRmVeSWpSXmKPExsVy+t9jAV37+rIAg8t9jBabHl9jdWD02Lyk PoAxissmJTUnsyy1SN8ugStjdV9swT/pircLp7M3MM4T72Lk5JAQMJH49PgvI4QtJnHh3nq2 LkYuDiGBRYwSWx7sYYJwNjNJtC99wARSxSagJvG54REbiC0ioCExpesxO0gRs8BSJoltSyaA JYQFgiV6fywAG8sioCpx++BfFhCbV8BJ4ufiw0wQ6+Qlnt7vA6vnFHCW+LppBVhcCKjm7OvH 7BMYeRcwMqxiFE0tSC4oTkrPNdIrTswtLs1L10vOz93ECPb5M+kdjKsaLA4xCnAwKvHwOqwr DRBiTSwrrsw9xCjBwawkwnu5tixAiDclsbIqtSg/vqg0J7X4EKM0B4uSOG+zR0qAkEB6Yklq dmpqQWoRTJaJg1OqgZH3avZlTUM5demZKl4We+zPTlO96p0lfeKqhIrrBP3GhFtVqySY3xdJ SLX8X/UytPuw6xelsh92V3zWhtUsPfaxP9HnB9+s1t0dOxcKdZ158zVYIM7ugOzq0r9WLub9 4f3T4z5khdit3KH44t2yRzX747zMYo/EGzyacyh1+iS56bPjDn8svKPEUpyRaKjFXFScCADZ EZHd9QEAAA== X-Spam-Note: CRM114 invocation failed X-Spam-Score: -9.0 (---------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-9.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.25 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -2.1 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kgene.kim@samsung.com, swarren@wwwdotorg.org, tony@atomide.com, devicetree-discuss@lists.ozlabs.org, tomasz.figa@gmail.com, t.figa@samsung.com, kyungmin.park@samsung.com, linux-samsung-soc@vger.kernel.org, thomas.abraham@linaro.org, linus.walleij@linaro.org, m.szyprowski@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The pointer to gpio_chip passed to pin_to_reg_bank utility function is used only to retrieve a pointer to samsung_pinctrl_drv_data structure. This patch modifies the function and its users to pass a pointer to samsung_pinctrl_drv_data directly. Signed-off-by: Tomasz Figa --- drivers/pinctrl/pinctrl-samsung.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/pinctrl/pinctrl-samsung.c b/drivers/pinctrl/pinctrl-samsung.c index c660fa5..aa42d54 100644 --- a/drivers/pinctrl/pinctrl-samsung.c +++ b/drivers/pinctrl/pinctrl-samsung.c @@ -250,14 +250,12 @@ static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev, * given a pin number that is local to a pin controller, find out the pin bank * and the register base of the pin bank. */ -static void pin_to_reg_bank(struct gpio_chip *gc, unsigned pin, - void __iomem **reg, u32 *offset, +static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata, + unsigned pin, void __iomem **reg, u32 *offset, struct samsung_pin_bank **bank) { - struct samsung_pinctrl_drv_data *drvdata; struct samsung_pin_bank *b; - drvdata = dev_get_drvdata(gc->dev); b = drvdata->ctrl->pin_banks; while ((pin >= b->pin_base) && @@ -292,7 +290,7 @@ static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector, * pin function number in the config register. */ for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) { - pin_to_reg_bank(drvdata->gc, pins[cnt] - drvdata->ctrl->base, + pin_to_reg_bank(drvdata, pins[cnt] - drvdata->ctrl->base, ®, &pin_offset, &bank); mask = (1 << bank->func_width) - 1; shift = pin_offset * bank->func_width; @@ -329,10 +327,13 @@ static int samsung_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned offset, bool input) { struct samsung_pin_bank *bank; + struct samsung_pinctrl_drv_data *drvdata; void __iomem *reg; u32 data, pin_offset, mask, shift; - pin_to_reg_bank(range->gc, offset, ®, &pin_offset, &bank); + drvdata = pinctrl_dev_get_drvdata(pctldev); + + pin_to_reg_bank(drvdata, offset, ®, &pin_offset, &bank); mask = (1 << bank->func_width) - 1; shift = pin_offset * bank->func_width; @@ -366,7 +367,7 @@ static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin, u32 cfg_value, cfg_reg; drvdata = pinctrl_dev_get_drvdata(pctldev); - pin_to_reg_bank(drvdata->gc, pin - drvdata->ctrl->base, ®_base, + pin_to_reg_bank(drvdata, pin - drvdata->ctrl->base, ®_base, &pin_offset, &bank); switch (cfg_type) { @@ -468,8 +469,11 @@ static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value) { void __iomem *reg; u32 pin_offset, data; + struct samsung_pinctrl_drv_data *drvdata; - pin_to_reg_bank(gc, offset, ®, &pin_offset, NULL); + drvdata = dev_get_drvdata(gc->dev); + + pin_to_reg_bank(drvdata, offset, ®, &pin_offset, NULL); data = readl(reg + DAT_REG); data &= ~(1 << pin_offset); if (value) @@ -482,8 +486,11 @@ static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset) { void __iomem *reg; u32 pin_offset, data; + struct samsung_pinctrl_drv_data *drvdata; + + drvdata = dev_get_drvdata(gc->dev); - pin_to_reg_bank(gc, offset, ®, &pin_offset, NULL); + pin_to_reg_bank(drvdata, offset, ®, &pin_offset, NULL); data = readl(reg + DAT_REG); data >>= pin_offset; data &= 1;