From patchwork Wed Oct 17 12:31:39 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roland Stigge X-Patchwork-Id: 1605751 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id DCD51DFABE for ; Wed, 17 Oct 2012 12:42:55 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TOSvG-0005dM-Vc; Wed, 17 Oct 2012 12:40:31 +0000 Received: from mail.work-microwave.de ([62.245.205.51] helo=work-microwave.de) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TOSsM-00046k-Sq for linux-arm-kernel@lists.infradead.org; Wed, 17 Oct 2012 12:37:34 +0000 Received: from rst-pc1.lan.work-microwave.de ([192.168.11.78]) (authenticated bits=0) by mail.work-microwave.de with ESMTP id q9HCbO13025487 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 17 Oct 2012 13:37:25 +0100 Received: by rst-pc1.lan.work-microwave.de (Postfix, from userid 1000) id AB49EAE06B; Wed, 17 Oct 2012 14:37:24 +0200 (CEST) From: Roland Stigge To: gregkh@linuxfoundation.org, grant.likely@secretlab.ca, linus.walleij@linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, w.sang@pengutronix.de, jbe@pengutronix.de, plagnioj@jcrosoft.com, highguy@gmail.com, broonie@opensource.wolfsonmicro.com, daniel-gl@gmx.net, rmallon@gmail.com Subject: [PATCH RFC 07/15 v5] gpio-generic: Add block GPIO API Date: Wed, 17 Oct 2012 14:31:39 +0200 Message-Id: <1350477107-26512-8-git-send-email-stigge@antcom.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1350477107-26512-1-git-send-email-stigge@antcom.de> References: <1350477107-26512-1-git-send-email-stigge@antcom.de> X-FEAS-SYSTEM-WL: rst@work-microwave.de, 192.168.11.78 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.4 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Roland Stigge X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch adds block GPIO API support to the gpio-generic driver. Signed-off-by: Roland Stigge --- drivers/gpio/gpio-generic.c | 56 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) --- linux-2.6.orig/drivers/gpio/gpio-generic.c +++ linux-2.6/drivers/gpio/gpio-generic.c @@ -122,6 +122,13 @@ static int bgpio_get(struct gpio_chip *g return bgc->read_reg(bgc->reg_dat) & bgc->pin2mask(bgc, gpio); } +static unsigned long bgpio_get_block(struct gpio_chip *gc, unsigned long mask) +{ + struct bgpio_chip *bgc = to_bgpio_chip(gc); + + return bgc->read_reg(bgc->reg_dat) & mask; +} + static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) { struct bgpio_chip *bgc = to_bgpio_chip(gc); @@ -170,6 +177,51 @@ static void bgpio_set_set(struct gpio_ch spin_unlock_irqrestore(&bgc->lock, flags); } +static void bgpio_set_block(struct gpio_chip *gc, unsigned long mask, + unsigned long values) +{ + struct bgpio_chip *bgc = to_bgpio_chip(gc); + unsigned long flags; + + spin_lock_irqsave(&bgc->lock, flags); + + bgc->data &= ~mask; + bgc->data |= values & mask; + + bgc->write_reg(bgc->reg_dat, bgc->data); + + spin_unlock_irqrestore(&bgc->lock, flags); +} + +static void bgpio_set_with_clear_block(struct gpio_chip *gc, unsigned long mask, + unsigned long values) +{ + struct bgpio_chip *bgc = to_bgpio_chip(gc); + unsigned long set_bits = values & mask; + unsigned long clr_bits = ~values & mask; + + if (set_bits) + bgc->write_reg(bgc->reg_set, set_bits); + if (clr_bits) + bgc->write_reg(bgc->reg_set, clr_bits); +} + +static void bgpio_set_set_block(struct gpio_chip *gc, unsigned long mask, + unsigned long values) +{ + struct bgpio_chip *bgc = to_bgpio_chip(gc); + unsigned long flags; + + spin_lock_irqsave(&bgc->lock, flags); + + bgc->data &= ~mask; + bgc->data |= values & mask; + + bgc->write_reg(bgc->reg_set, bgc->data); + + spin_unlock_irqrestore(&bgc->lock, flags); +} + static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio) { return 0; @@ -317,14 +369,18 @@ static int bgpio_setup_io(struct bgpio_c bgc->reg_set = set; bgc->reg_clr = clr; bgc->gc.set = bgpio_set_with_clear; + bgc->gc.set_block = bgpio_set_with_clear_block; } else if (set && !clr) { bgc->reg_set = set; bgc->gc.set = bgpio_set_set; + bgc->gc.set_block = bgpio_set_set_block; } else { bgc->gc.set = bgpio_set; + bgc->gc.set_block = bgpio_set_block; } bgc->gc.get = bgpio_get; + bgc->gc.get_block = bgpio_get_block; return 0; }