From patchwork Fri Oct 19 02:45:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kim Kukjin X-Patchwork-Id: 1652981 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id D9BA540135 for ; Fri, 26 Oct 2012 17:43:34 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TRnvV-0004HH-1o; Fri, 26 Oct 2012 17:42:33 +0000 Received: from mail-da0-f49.google.com ([209.85.210.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TRnXo-0000O0-3t for linux-arm-kernel@lists.infradead.org; Fri, 26 Oct 2012 17:18:04 +0000 Received: by mail-da0-f49.google.com with SMTP id q27so1281687daj.36 for ; Fri, 26 Oct 2012 10:18:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=ZkDIAFDFxgOadP30MokHAf34kL0wvCvkwlJgknBYlko=; b=fTl7XeRMSttMHVbtO8n+MSZTebVeFwphUvHDqDIhrBuz51CpT0yi9XPgBDoOyqREoM LWNqIdg3VnxLNs4B/AdGd5YJ1FVTkZB+lMVfUeeCu8mgJpTNuOYb1Uca6sfJgvFbyjs7 iGRHe+4ZsulJRBSLYZuIqODkZT4FXqpt5Xnn+Ayb9VlwU9NNDzNn3l1SqYHOP6vkF5X/ dwTRfqOOZXlX0Aon8IaVBwUJrHQl26cPCiMkeYRQHhPrzbOIodtoiCL80KwJKUwc9AHW 4Y+mb9D18zg2DPizkCBVpLcTfVV7sWSsNXQy0Jm8txe2DzK4UyN+WU+36vgDDSA7grNq As/Q== Received: by 10.66.83.9 with SMTP id m9mr63612305pay.22.1351271883789; Fri, 26 Oct 2012 10:18:03 -0700 (PDT) Received: from localhost.localdomain ([121.136.168.198]) by mx.google.com with ESMTPS id qn1sm1445449pbc.55.2012.10.26.10.17.59 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 26 Oct 2012 10:18:01 -0700 (PDT) From: Kukjin Kim To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 5/7] ARM: dts: add clock controller node for Samsung EXYNOS5440 Date: Fri, 19 Oct 2012 11:45:57 +0900 Message-Id: <1350614759-1852-5-git-send-email-kgene.kim@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1350614759-1852-1-git-send-email-kgene.kim@samsung.com> References: <1350614759-1852-1-git-send-email-kgene.kim@samsung.com> X-Spam-Note: CRM114 invocation failed X-Spam-Note: SpamAssassin invocation failed Cc: Kukjin Kim , Thomas Abraham , Thomas Abraham X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Thomas Abraham This patch add device tree nodes for representing the clock controller module in Samsung EXYNOS5440 SoC. Signed-off-by: Thomas Abraham Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5440-clock.dtsi | 143 +++++++++++++++++++++++++++++++ 1 files changed, 143 insertions(+), 0 deletions(-) create mode 100644 arch/arm/boot/dts/exynos5440-clock.dtsi diff --git a/arch/arm/boot/dts/exynos5440-clock.dtsi b/arch/arm/boot/dts/exynos5440-clock.dtsi new file mode 100644 index 0000000..062f29f --- /dev/null +++ b/arch/arm/boot/dts/exynos5440-clock.dtsi @@ -0,0 +1,143 @@ +/* + * Samsung's EXYNOS5440 SoC clock nodes + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/ { + xmu { + compatible = "samsung,exynos5440-xmu"; + reg = <0x160000 0x1000>; + + xtal: xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "xtal"; + clock-frequency = <50000000>; + }; + + peri_pll: peri-pll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "xusbxti"; + clock-frequency = <1000000000>; + }; + + peri_250mhz: peri-250mhz { + compatible = "samsung,fixed-factor-clock"; + #clock-cells = <0>; + clock-output-names = "peri-250mhz"; + clocks = <&peri_pll>; + clock-fixed-factor-div = <4>; + }; + + peri_200mhz: peri-200mhz { + compatible = "samsung,fixed-factor-clock"; + #clock-cells = <0>; + clock-output-names = "peri-200mhz"; + clocks = <&peri_pll>; + clock-fixed-factor-div = <5>; + }; + + peri_125mhz: peri-125mhz { + compatible = "samsung,fixed-factor-clock"; + #clock-cells = <0>; + clock-output-names = "peri-125mhz"; + clocks = <&peri_250mhz>; + clock-fixed-factor-div = <2>; + }; + + b250_clk: b250-clk { + compatible = "samsung,clock-gate"; + #clock-cells = <0>; + clock-output-names = "b250-clk"; + clocks = <&peri_250mhz>; + reg-info = <0xf4 0>; + }; + + pb0250_clk: pb0250-clk { + compatible = "samsung,clock-gate"; + #clock-cells = <0>; + clock-output-names = "pb0250-clk"; + clocks = <&peri_250mhz>; + reg-info = <0xf4 1>; + }; + + pr0250_clk: pr0250-clk { + compatible = "samsung,clock-gate"; + #clock-cells = <0>; + clock-output-names = "pr0250-clk"; + clocks = <&peri_250mhz>; + reg-info = <0xf4 2>; + }; + + pr1250_clk: pr1250-clk { + compatible = "samsung,clock-gate"; + #clock-cells = <0>; + clock-output-names = "pr1250-clk"; + clocks = <&peri_250mhz>; + reg-info = <0xf4 3>; + }; + + cs250_clk: cs250-clk { + compatible = "samsung,clock-gate"; + #clock-cells = <0>; + clock-output-names = "cs250-clk"; + clocks = <&peri_250mhz>; + reg-info = <0xf4 4>; + }; + + drex_pclk: drex-pclk { + compatible = "samsung,clock-gate"; + #clock-cells = <0>; + clock-output-names = "drex-pclk"; + clocks = <&peri_125mhz>; + reg-info = <0xf4 5>; + }; + + b125_pclk: b125-pclk { + compatible = "samsung,clock-gate"; + #clock-cells = <0>; + clock-output-names = "b125-pclk"; + clocks = <&peri_125mhz>; + reg-info = <0xf4 6>; + }; + + b200_clk: b200-clk { + compatible = "samsung,clock-gate"; + #clock-cells = <0>; + clock-output-names = "b200-clk"; + clocks = <&peri_200mhz>; + reg-info = <0xf4 7>; + }; + + sata_clk: sata-clk { + compatible = "samsung,clock-gate"; + #clock-cells = <0>; + clock-output-names = "sata-clk"; + clocks = <&peri_200mhz>; + reg-info = <0xf4 8>; + }; + + usb_clk: usb-clk { + compatible = "samsung,clock-gate"; + #clock-cells = <0>; + clock-output-names = "usb-clk"; + clocks = <&peri_200mhz>; + reg-info = <0xf4 9>; + }; + + gmac0_clk: gmac0-clk { + compatible = "samsung,clock-gate"; + #clock-cells = <0>; + clock-output-names = "gmac0-clk"; + clocks = <&peri_200mhz>; + reg-info = <0xf4 10>; + }; + }; +};