From patchwork Mon Oct 22 09:46:55 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 1624991 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id E99AA400E9 for ; Mon, 22 Oct 2012 09:56:57 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TQEi8-0002EK-MB; Mon, 22 Oct 2012 09:54:16 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TQEgs-0001lm-Pg for linux-arm-kernel@lists.infradead.org; Mon, 22 Oct 2012 09:53:01 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id q9M9qhbS032200; Mon, 22 Oct 2012 04:52:44 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9M9qhQP028499; Mon, 22 Oct 2012 04:52:43 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.1.323.3; Mon, 22 Oct 2012 04:52:43 -0500 Received: from localhost (h64-14.vpn.ti.com [172.24.64.14]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9M9qgAe026807; Mon, 22 Oct 2012 04:52:43 -0500 From: Felipe Balbi To: Subject: [PATCH 5/8] i2c: omap: introduce and use OMAP_I2C_IP_VERSION_3 Date: Mon, 22 Oct 2012 12:46:55 +0300 Message-ID: <1350899218-13624-6-git-send-email-balbi@ti.com> X-Mailer: git-send-email 1.8.0.rc0 In-Reply-To: <1350899218-13624-1-git-send-email-balbi@ti.com> References: <1350899218-13624-1-git-send-email-balbi@ti.com> MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Benoit Cousson , Tony Lindgren , w.sang@pengutronix.de, Felipe Balbi , Santosh Shilimkar , ben-linux@fluff.org, Linux OMAP Mailing List , Shubhrajyoti Datta , Linux ARM Kernel Mailing List X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org on OMAP4+ we want to read IRQSTATUS_RAW register, instead of IRQSTATUS. The reason being that IRQSTATUS will only contain the bits which were enabled on IRQENABLE_SET and that will break when we need to poll for a certain bit which wasn't enabled as an IRQ source. One such case is after we finish converting to deferred stop bit, we will have to poll for ARDY bit before returning control for the client driver in order to prevent us from trying to start a transfer on a bus which is already busy. Note, however, that omap-i2c.c needs a big rework on register definition and register access. Such work will be done in a separate series of patches. Cc: Benoit Cousson Signed-off-by: Felipe Balbi --- arch/arm/mach-omap2/i2c.c | 3 ++- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 2 +- drivers/i2c/busses/i2c-omap.c | 26 ++++++++++++++++++++++---- include/linux/i2c-omap.h | 1 + 4 files changed, 26 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index fc57e67..e871928 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@ -66,7 +66,8 @@ int omap_i2c_reset(struct omap_hwmod *oh) u16 i2c_con; int c = 0; - if (oh->class->rev == OMAP_I2C_IP_VERSION_2) { + if ((oh->class->rev == OMAP_I2C_IP_VERSION_2) || + (oh->class->rev == OMAP_I2C_IP_VERSION_3)) { i2c_con = OMAP4_I2C_CON_OFFSET; } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) { i2c_con = OMAP2_I2C_CON_OFFSET; diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 652d028..ae9c023 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -1521,7 +1521,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = { static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { .name = "i2c", .sysc = &omap44xx_i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_2, + .rev = OMAP_I2C_IP_VERSION_3, .reset = &omap_i2c_reset, }; diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 6219522..c65d526 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -271,8 +271,18 @@ static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev, static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg) { - return __raw_readw(i2c_dev->base + + /* if we are OMAP_I2C_IP_VERSION_3, we need to read from + * IRQSTATUS_RAW, but write to IRQSTATUS + */ + if ((i2c_dev->dtrev == OMAP_I2C_IP_VERSION_3) && + (reg == OMAP_I2C_STAT_REG)) { + return __raw_readw(i2c_dev->base + + ((i2c_dev->regs[reg] - 0x04) + << i2c_dev->reg_shift)); + } else { + return __raw_readw(i2c_dev->base + (i2c_dev->regs[reg] << i2c_dev->reg_shift)); + } } static int omap_i2c_init(struct omap_i2c_dev *dev) @@ -1124,10 +1134,18 @@ omap_i2c_probe(struct platform_device *pdev) dev->reg_shift = (dev->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3; - if (dev->dtrev == OMAP_I2C_IP_VERSION_2) - dev->regs = (u8 *)reg_map_ip_v2; - else + switch (dev->dtrev) { + case OMAP_I2C_IP_VERSION_1: dev->regs = (u8 *)reg_map_ip_v1; + break; + case OMAP_I2C_IP_VERSION_2: + /* FALLTHROUGH */ + case OMAP_I2C_IP_VERSION_3: + /* FALLTHROUGH */ + default: + dev->regs = (u8 *)reg_map_ip_v2; + break; + } pm_runtime_enable(dev->dev); pm_runtime_set_autosuspend_delay(dev->dev, OMAP_I2C_PM_TIMEOUT); diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h index df804ba..84f7355 100644 --- a/include/linux/i2c-omap.h +++ b/include/linux/i2c-omap.h @@ -14,6 +14,7 @@ #define OMAP_I2C_IP_VERSION_1 1 #define OMAP_I2C_IP_VERSION_2 2 +#define OMAP_I2C_IP_VERSION_3 3 /* struct omap_i2c_bus_platform_data .flags meanings */