From patchwork Sun Oct 28 20:35:21 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roland Stigge X-Patchwork-Id: 1658851 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 36A9C3FCF7 for ; Sun, 28 Oct 2012 20:37:35 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TSZa9-0000kU-LL; Sun, 28 Oct 2012 20:35:41 +0000 Received: from mail.work-microwave.de ([62.245.205.51] helo=work-microwave.de) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TSZa5-0000je-Nx for linux-arm-kernel@lists.infradead.org; Sun, 28 Oct 2012 20:35:39 +0000 Received: from rst-pc1.lan.work-microwave.de ([192.168.11.78]) (authenticated bits=0) by mail.work-microwave.de with ESMTP id q9SKZTVt031996 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Sun, 28 Oct 2012 21:35:30 +0100 Received: by rst-pc1.lan.work-microwave.de (Postfix, from userid 1000) id C5FE5AE076; Sun, 28 Oct 2012 21:35:29 +0100 (CET) From: Roland Stigge To: tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, paul.gortmaker@windriver.com, benh@kernel.crashing.org, kevin.wells@nxp.com, srinivas.bakki@nxp.com Subject: [PATCH 2/3] ARM: LPC32xx: Relocate calls to irq_set_chained_handler() Date: Sun, 28 Oct 2012 21:35:21 +0100 Message-Id: <1351456522-22309-2-git-send-email-stigge@antcom.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1351456522-22309-1-git-send-email-stigge@antcom.de> References: <1351456522-22309-1-git-send-email-stigge@antcom.de> X-FEAS-SYSTEM-WL: rst@work-microwave.de, 192.168.11.78 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Roland Stigge X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch fixes the issue of an access to a yet uninitialized data structure at the point where irq_set_chained_handler() was called by moving the respective calls to the end of lpc32xx_init_irq(). The call path was: irq_set_chained_handler() -> __irq_set_handler() -> irq_startup() -> irq_enable() -> desc->irq_data.chip->irq_unmask() at which point lpc32xx_unmask_irq() effectively read desc->irq_data.hwirq which was only later initialized. Signed-off-by: Roland Stigge --- arch/arm/mach-lpc32xx/irq.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) --- linux-2.6.orig/arch/arm/mach-lpc32xx/irq.c +++ linux-2.6/arch/arm/mach-lpc32xx/irq.c @@ -447,10 +447,6 @@ void __init lpc32xx_init_irq(void) __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE)); __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE)); - /* MIC SUBIRQx interrupts will route handling to the chain handlers */ - irq_set_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler); - irq_set_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler); - /* Initially disable all wake events */ __raw_writel(0, LPC32XX_CLKPWR_P01_ER); __raw_writel(0, LPC32XX_CLKPWR_INT_ER); @@ -479,4 +475,8 @@ void __init lpc32xx_init_irq(void) NULL); if (!lpc32xx_mic_domain) panic("Unable to add MIC irq domain\n"); + + /* MIC SUBIRQx interrupts will route handling to the chain handlers */ + irq_set_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler); + irq_set_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler); }