From patchwork Mon Oct 29 09:59:07 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 1662661 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id CACD43FDDA for ; Mon, 29 Oct 2012 10:01:11 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TSm7z-000455-IQ; Mon, 29 Oct 2012 09:59:27 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TSm7u-000430-5G for linux-arm-kernel@lists.infradead.org; Mon, 29 Oct 2012 09:59:23 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id q9T9xFaK009327; Mon, 29 Oct 2012 04:59:16 -0500 Received: from DBDE70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9T9xDZo026904; Mon, 29 Oct 2012 15:29:13 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by dbde70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 14.1.323.3; Mon, 29 Oct 2012 15:29:13 +0530 Received: from localhost.localdomain (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9T9xAMh030139; Mon, 29 Oct 2012 15:29:11 +0530 From: Vaibhav Hiremath To: Subject: [PATCH] ARM: OMAP2+: am33xx: Add PRM warm reset/reboot support Date: Mon, 29 Oct 2012 15:29:07 +0530 Message-ID: <1351504747-10554-1-git-send-email-hvaibhav@ti.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.152 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Afzal Mohammed , linux@arm.linux.org.uk, tony@atomide.com, Paul Walmsley , Vaibhav Hiremath , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch adds reboot capability to all AM33XX based boards/EVM's, by asserting PRM warm reset bit on 'reboot' command. Signed-off-by: Vaibhav Hiremath Tested-by: Daniel Mack Cc: Paul Walmsley Cc: Tony Lindgren Cc: Afzal Mohammed --- Tested on AM335xEVM and BeagleBone platform. arch/arm/mach-omap2/board-generic.c | 1 + arch/arm/mach-omap2/prcm.c | 3 +++ arch/arm/mach-omap2/prm33xx.c | 15 +++++++++++++++ arch/arm/mach-omap2/prm33xx.h | 1 + 4 files changed, 20 insertions(+), 0 deletions(-) -- 1.7.0.4 diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 601ecdf..6a69ceb 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -114,6 +114,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") .init_machine = omap_generic_init, .timer = &omap3_am33xx_timer, .dt_compat = am33xx_boards_compat, + .restart = omap_prcm_restart, MACHINE_END #endif diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index cff270a..07f163c 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -34,6 +34,7 @@ #include "cm2xxx_3xxx.h" #include "prm2xxx_3xxx.h" #include "prm44xx.h" +#include "prm33xx.h" #include "prminst44xx.h" #include "cminst44xx.h" #include "prm-regbits-24xx.h" @@ -73,6 +74,8 @@ void omap_prcm_restart(char mode, const char *cmd) omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); } else if (cpu_is_omap44xx()) { omap4_prminst_global_warm_sw_reset(); /* never returns */ + } else if (soc_is_am33xx()) { + am33xx_prm_global_warm_sw_reset(); /* never returns */ } else { WARN_ON(1); } diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index 53ec9cb..657c3d0 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c @@ -135,6 +135,21 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst, return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; } +void am33xx_prm_global_warm_sw_reset(void) +{ + u32 v; + + v = am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD, + AM33XX_PRM_RSTCTRL_OFFSET); + v |= AM33XX_GLOBAL_WARM_SW_RST_MASK; + am33xx_prm_write_reg(v, AM33XX_PRM_DEVICE_MOD, + AM33XX_PRM_RSTCTRL_OFFSET); + + /* OCP barrier */ + v = am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD, + AM33XX_PRM_RSTCTRL_OFFSET); +} + static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) { am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK, diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h index 3f25c56..cdfc694 100644 --- a/arch/arm/mach-omap2/prm33xx.h +++ b/arch/arm/mach-omap2/prm33xx.h @@ -126,4 +126,5 @@ extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst, extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs); extern int am33xx_prm_deassert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs, u16 rstst_offs); +extern void am33xx_prm_global_warm_sw_reset(void); #endif