From patchwork Thu Nov 1 15:49:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hunter, Jon" X-Patchwork-Id: 1685421 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id A77F43FCDF for ; Thu, 1 Nov 2012 15:51:44 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TTx1s-0002Op-Oq; Thu, 01 Nov 2012 15:50:00 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TTx1m-0002Nh-5D for linux-arm-kernel@lists.infradead.org; Thu, 01 Nov 2012 15:49:55 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id qA1Fnqst006340; Thu, 1 Nov 2012 10:49:52 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA1Fnqj9009088; Thu, 1 Nov 2012 10:49:52 -0500 Received: from dlelxv24.itg.ti.com (172.17.1.199) by dfle72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.1.323.3; Thu, 1 Nov 2012 10:49:52 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlelxv24.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA1FnqX9002253; Thu, 1 Nov 2012 10:49:52 -0500 Received: from localhost (h1-99.vpn.ti.com [172.24.1.99]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id qA1Fnow25582; Thu, 1 Nov 2012 10:49:50 -0500 (CDT) From: Jon Hunter To: Benoit Cousson Subject: [PATCH 1/3] ARM: dts: Update OMAP4 timer addresses Date: Thu, 1 Nov 2012 10:49:25 -0500 Message-ID: <1351784967-32520-2-git-send-email-jon-hunter@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1351784967-32520-1-git-send-email-jon-hunter@ti.com> References: <1351784967-32520-1-git-send-email-jon-hunter@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121101_114954_373084_015902BA X-CRM114-Status: UNSURE ( 9.39 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.40 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: device-tree , linux-omap , Jon Hunter , linux-arm X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org For OMAP4 devices, timers 5-8 have both a L3 bus address and a Cortex-A9 private bus address. Currently the device-tree source only contains the L3 bus address for these timers. Update these timers to include the Cortex-A9 private address and make the default address the Cortex-A9 private bus address to match the current HWMOD implementation. Signed-off-by: Jon Hunter --- arch/arm/boot/dts/omap4.dtsi | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 23ee149..739bb79 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -469,33 +469,37 @@ ti,hwmods = "timer4"; }; - timer5: timer@49038000 { + timer5: timer@40138000 { compatible = "ti,omap2-timer"; - reg = <0x49038000 0x80>; + reg = <0x40138000 0x80>, + <0x49038000 0x80>; interrupts = <0 41 0x4>; ti,hwmods = "timer5"; ti,timer-dsp; }; - timer6: timer@4903a000 { + timer6: timer@4013a000 { compatible = "ti,omap2-timer"; - reg = <0x4903a000 0x80>; + reg = <0x4013a000 0x80>, + <0x4903a000 0x80>; interrupts = <0 42 0x4>; ti,hwmods = "timer6"; ti,timer-dsp; }; - timer7: timer@4903c000 { + timer7: timer@4013c000 { compatible = "ti,omap2-timer"; - reg = <0x4903c000 0x80>; + reg = <0x4013c000 0x80>, + <0x4903c000 0x80>; interrupts = <0 43 0x4>; ti,hwmods = "timer7"; ti,timer-dsp; }; - timer8: timer@4903e000 { + timer8: timer@4013e000 { compatible = "ti,omap2-timer"; - reg = <0x4903e000 0x80>; + reg = <0x4013e000 0x80>, + <0x4903e000 0x80>; interrupts = <0 44 0x4>; ti,hwmods = "timer8"; ti,timer-pwm;