From patchwork Tue Nov 6 13:48:37 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "AnilKumar, Chimata" X-Patchwork-Id: 1704571 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 96CF2DF230 for ; Tue, 6 Nov 2012 13:52:21 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TVjXp-0007Nr-VV; Tue, 06 Nov 2012 13:50:22 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TVjXR-0007H7-7l for linux-arm-kernel@lists.infradead.org; Tue, 06 Nov 2012 13:49:59 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id qA6DnsJk028077; Tue, 6 Nov 2012 07:49:55 -0600 Received: from DBDE70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA6DnqVt009214; Tue, 6 Nov 2012 19:19:54 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by dbde70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 14.1.323.3; Tue, 6 Nov 2012 19:19:52 +0530 Received: from localhost.localdomain (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA6Dnm60007194; Tue, 6 Nov 2012 19:19:52 +0530 From: AnilKumar Ch To: Subject: [PATCH RESEND 09/10] ARM: dts: AM33XX: Add pinmux configuration for gpio-keys to EVMSK Date: Tue, 6 Nov 2012 19:18:37 +0530 Message-ID: <1352209718-5586-10-git-send-email-anilkumar@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1352209718-5586-1-git-send-email-anilkumar@ti.com> References: <1352209718-5586-1-git-send-email-anilkumar@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121106_084957_502843_CD1101ED X-CRM114-Status: GOOD ( 11.97 ) X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: b-cousson@ti.com, devicetree-discuss@lists.ozlabs.org, grant.likely@secretlab.ca, AnilKumar Ch , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add pinmux configurations for gpio based keys to am335x-evmsk. In this patch, only single named mode/state is added and these pins are configured during pinctrl driver initialization. Default mode is nothing but the values required for the module during active state. With this configurations module is functional as expected. Signed-off-by: AnilKumar Ch --- arch/arm/boot/dts/am335x-evmsk.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 7262fa8..0f825dd 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -32,7 +32,7 @@ am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <&user_leds_s0>; + pinctrl-0 = <&user_leds_s0 &gpio_keys_s0>; user_leds_s0: user_leds_s0 { pinctrl-single,pins = < @@ -42,6 +42,15 @@ 0x1c 0x7 /* gpmc_ad7.gpio1_7, OUTPUT | MODE7 */ >; }; + + gpio_keys_s0: gpio_keys_s0 { + pinctrl-single,pins = < + 0x94 0x27 /* gpmc_oen_ren.gpio2_3, INPUT | MODE7 */ + 0x90 0x27 /* gpmc_advn_ale.gpio2_2, INPUT | MODE7 */ + 0x70 0x27 /* gpmc_wait0.gpio0_30, INPUT | MODE7 */ + 0x9c 0x27 /* gpmc_ben0_cle.gpio2_5, INPUT | MODE7 */ + >; + }; }; ocp {