From patchwork Thu Nov 15 13:55:38 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1749281 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id B5D78DF230 for ; Thu, 15 Nov 2012 13:58:28 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TYzvf-0001L6-DH; Thu, 15 Nov 2012 13:56:27 +0000 Received: from eu1sys200aog115.obsmtp.com ([207.126.144.139]) by merlin.infradead.org with smtps (Exim 4.76 #1 (Red Hat Linux)) id 1TYzvG-00019d-L3 for linux-arm-kernel@lists.infradead.org; Thu, 15 Nov 2012 13:56:04 +0000 Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob115.postini.com ([207.126.147.11]) with SMTP ID DSNKUKT0aJixbhlNB2+bIwkl9VyAD81DUbBA@postini.com; Thu, 15 Nov 2012 13:56:02 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3AE281C1; Thu, 15 Nov 2012 13:55:42 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B0D0926D1; Thu, 15 Nov 2012 13:55:42 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 6E9CC24C2F3; Thu, 15 Nov 2012 14:55:35 +0100 (CET) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.83.0; Thu, 15 Nov 2012 14:55:41 +0100 From: Linus Walleij To: Subject: [PATCH 2/2] clocksource/mtu-nomadik: use apb_pclk Date: Thu, 15 Nov 2012 14:55:38 +0100 Message-ID: <1352987738-9422-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121115_085603_660922_2710AA3C X-CRM114-Status: GOOD ( 13.99 ) X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [207.126.144.139 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Anmar Oueja , Ulf Hansson , Linus Walleij , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Ulf Hansson After improving the clock tree we need to make sure the the MTU timer explicitly grabs and enables it silicon clock (pclk). Signed-off-by: Ulf Hansson Acked-by: Mike Turquette Signed-off-by: Linus Walleij --- This version of the patch is based upon the ux500 SPARSE_IRQ commit and is intended to be merged after [1/2] so as to avoid conflicts between the clk and ARM SoC trees. --- drivers/clocksource/nomadik-mtu.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/nomadik-mtu.c b/drivers/clocksource/nomadik-mtu.c index 23c780b..8914c3c 100644 --- a/drivers/clocksource/nomadik-mtu.c +++ b/drivers/clocksource/nomadik-mtu.c @@ -177,9 +177,15 @@ void nmdk_clksrc_reset(void) void __init nmdk_timer_init(void __iomem *base, int irq) { unsigned long rate; - struct clk *clk0; + struct clk *clk0, *pclk0; mtu_base = base; + + pclk0 = clk_get_sys("mtu0", "apb_pclk"); + BUG_ON(IS_ERR(pclk0)); + BUG_ON(clk_prepare(pclk0) < 0); + BUG_ON(clk_enable(pclk0) < 0); + clk0 = clk_get_sys("mtu0", NULL); BUG_ON(IS_ERR(clk0)); BUG_ON(clk_prepare(clk0) < 0);