From patchwork Thu Nov 22 08:00:05 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 1783091 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 55ABE3FC64 for ; Thu, 22 Nov 2012 08:08:38 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TbRmG-0004QE-9u; Thu, 22 Nov 2012 08:04:52 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TbRiJ-0002JY-C1 for linux-arm-kernel@lists.infradead.org; Thu, 22 Nov 2012 08:01:01 +0000 Received: by mail-pb0-f49.google.com with SMTP id un15so5261294pbc.36 for ; Thu, 22 Nov 2012 00:00:47 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=QmSu1R6Z7Wx5yeyycUlFKEpy1pJ+MQD63pjWB/snoFA=; b=cdPEG00tabY6hEPYJCgkfyLHmjz30z2Xy/CI03qGr4+tZlTxKLv/JNUd2NVZY6fWmv VSxmkTCSWD57Y0O6+lE7z2kbVgsDW1J4IPpg7FUeE558r8lAHpmcQIIIAS+6phj35Tkh 2D0gVpS2Bx9tjiCiG5THAKgf1WUmC8XYAyueFNC7Yukyj31FlittkbGiiTvhl95qa/s1 VwVvlomnHf8Ce0LbyHgQlxqDrFuA6fJlA3ny8ObI4rkxaZpX6VRIE5Q3QbKov4gUfuwq KZOO+K9tbS5e5HEB7sqtrkvmumCaY3vq7d9EdZhwHdKpLsq5U6J85xT36aBCywOKdtt+ AA5w== Received: by 10.68.239.198 with SMTP id vu6mr2434736pbc.109.1353571247078; Thu, 22 Nov 2012 00:00:47 -0800 (PST) Received: from xps-iwamatsu.renesas.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPS id s1sm1507624paz.0.2012.11.22.00.00.44 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 22 Nov 2012 00:00:46 -0800 (PST) From: Nobuhiro Iwamatsu To: linux-sh@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 08/15] ARM: mach-shmobile: Add DT table of INTC for r8a7740 Date: Thu, 22 Nov 2012 17:00:05 +0900 Message-Id: <1353571213-26006-9-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1353571213-26006-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> References: <1353571213-26006-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> X-Gm-Message-State: ALoCoQkxCe7437yvCYjOgb8wa0EczOM7ZHGqkBXru7LxEutbCUTTMnbPmaXIhRvAnzaDu+CNI7It X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121122_030047_804761_69D9E3C1 X-CRM114-Status: GOOD ( 10.54 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Nobuhiro Iwamatsu , horms@verge.net.au, magnus.damm@gmail.com, Magnus Damm X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Cc: Magnus Damm Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Simon Horman --- v3 [Nobuhiro Iwamatsu] * Add interrupt-cells to interrupt-controllers. * Change compatible to "renesas,sh_intc". v2 [Simon Horman] * Removed trailing whitespace v1 [Nobuhiro Iwamatsu] --- arch/arm/boot/dts/r8a7740.dtsi | 967 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 966 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 798fa35..9673582 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -1,5 +1,5 @@ /* - * Device Tree Source for the r8a7740 SoC + * Device Tree Source for Renesas r8a7740 * * Copyright (C) 2012 Renesas Solutions Corp. * @@ -18,4 +18,969 @@ compatible = "arm,cortex-a9"; }; }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + intca: interrupt-controller@0 { + compatible = "renesas,sh_intc"; + interrupt-controller; + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <1>; + ranges; + + reg = <0xe6940000 0x200>, <0xe6950000 0x200>; + group_size = <19>; + + DIRC: intsrc1 { vector = <0x0560>; }; + ATAPI: intsrc2 { vector = <0x05E0>; }; + IIC1_ALI: intsrc3 { vector = <0x0780>; }; + IIC1_TACKI: intsrc4 { vector = <0x07A0>; }; + IIC1_WAITI: intsrc5 { vector = <0x07C0>; }; + IIC1_DTEI: intsrc6 { vector = <0x07E0>; }; + AP_ARM_COMMTX: intsrc7 { vector = <0x0840>; }; + AP_ARM_COMMRX: intsrc8 { vector = <0x0860>; }; + MFI: intsrc9 { vector = <0x0900>; }; + MFIS: intsrc10 { vector = <0x0920>; }; + BBIF1: intsrc11 { vector = <0x0940>; }; + BBIF2: intsrc12 { vector = <0x0960>; }; + USBHSDMAC: intsrc13 { vector = <0x0A00>; }; + USBF_OUL_SOF: intsrc14 { vector = <0x0A20>; }; + USBF_IXL_INT: intsrc15 { vector = <0x0A40>; }; + SGX540: intsrc16 { vector = <0x0A60>; }; + CMT1_0: intsrc17 { vector = <0x0B00>; }; + CMT1_1: intsrc18 { vector = <0x0B20>; }; + CMT1_2: intsrc19 { vector = <0x0B40>; }; + CMT1_3: intsrc20 { vector = <0x0B60>; }; + CMT2: intsrc21 { vector = <0x0B80>; }; + CMT3: intsrc22 { vector = <0x0BA0>; }; + KEYSC: intsrc23 { vector = <0x0BE0>; }; + SCIFA0: intsrc24 { vector = <0x0C00>; }; + SCIFA1: intsrc25 { vector = <0x0C20>; }; + SCIFA2: intsrc26 { vector = <0x0C40>; }; + SCIFA3: intsrc27 { vector = <0x0C60>; }; + MSIOF2: intsrc28 { vector = <0x0C80>; }; + MSIOF1: intsrc29 { vector = <0x0D00>; }; + SCIFA4: intsrc30 { vector = <0x0D20>; }; + SCIFA5: intsrc31 { vector = <0x0D40>; }; + SCIFB: intsrc32 { vector = <0x0D60>; }; + FLCTL_FLSTEI: intsrc33 { vector = <0x0D80>; }; + FLCTL_FLTENDI: intsrc34 { vector = <0x0DA0>; }; + FLCTL_FLTREQ0I: intsrc35 { vector = <0x0DC0>; }; + FLCTL_FLTREQ1I: intsrc36 { vector = <0x0DE0>; }; + SDHI0_0: intsrc37 { vector = <0x0E00>; }; + SDHI0_1: intsrc38 { vector = <0x0E20>; }; + SDHI0_2: intsrc39 { vector = <0x0E40>; }; + SDHI0_3: intsrc40 { vector = <0x0E60>; }; + SDHI1_0: intsrc41 { vector = <0x0E80>; }; + SDHI1_1: intsrc42 { vector = <0x0EA0>; }; + SDHI1_2: intsrc43 { vector = <0x0EC0>; }; + SDHI1_3: intsrc44 { vector = <0x0EE0>; }; + AP_ARM_L2CINT: intsrc45 { vector = <0x0FA0>; }; + IRDA: intsrc46 { vector = <0x0480>; }; + TPU0: intsrc47 { vector = <0x04A0>; }; + SCIFA6: intsrc48 { vector = <0x04C0>; }; + SCIFA7: intsrc49 { vector = <0x04E0>; }; + GETHER: intsrc50 { vector = <0x0500>; }; + ICBS0: intsrc51 { vector = <0x0540>; }; + DDM: intsrc52 { vector = <0x1140>; }; + SDHI2_0: intsrc53 { vector = <0x1200>; }; + SDHI2_1: intsrc54 { vector = <0x1220>; }; + SDHI2_2: intsrc55 { vector = <0x1240>; }; + SDHI2_3: intsrc56 { vector = <0x1260>; }; + RWDT0: intsrc57 { vector = <0x1280>; }; + DMAC1_1_DEI0: intsrc58 { vector = <0x2000>; }; + DMAC1_1_DEI1: intsrc59 { vector = <0x2020>; }; + DMAC1_1_DEI2: intsrc60 { vector = <0x2040>; }; + DMAC1_1_DEI3: intsrc61 { vector = <0x2060>; }; + DMAC1_2_DEI4: intsrc62 { vector = <0x2080>; }; + DMAC1_2_DEI5: intsrc63 { vector = <0x20A0>; }; + DMAC1_2_DADERR: intsrc64 { vector = <0x20C0>; }; + DMAC2_1_DEI0: intsrc65 { vector = <0x2100>; }; + DMAC2_1_DEI1: intsrc66 { vector = <0x2120>; }; + DMAC2_1_DEI2: intsrc67 { vector = <0x2140>; }; + DMAC2_1_DEI3: intsrc68 { vector = <0x2160>; }; + DMAC2_2_DEI4: intsrc69 { vector = <0x2180>; }; + DMAC2_2_DEI5: intsrc70 { vector = <0x21A0>; }; + DMAC2_2_DADERR: intsrc71 { vector = <0x21C0>; }; + DMAC3_1_DEI0: intsrc72 { vector = <0x2200>; }; + DMAC3_1_DEI1: intsrc73 { vector = <0x2220>; }; + DMAC3_1_DEI2: intsrc74 { vector = <0x2240>; }; + DMAC3_1_DEI3: intsrc75 { vector = <0x2260>; }; + DMAC3_2_DEI4: intsrc76 { vector = <0x2280>; }; + DMAC3_2_DEI5: intsrc77 { vector = <0x22A0>; }; + DMAC3_2_DADERR: intsrc78 { vector = <0x22C0>; }; + SHWYSTAT_RT: intsrc79 { vector = <0x1300>; }; + SHWYSTAT_HS: intsrc80 { vector = <0x1320>; }; + SHWYSTAT_COM: intsrc81 { vector = <0x1340>; }; + HDMI: intsrc82 { vector = <0x1700>; }; + USBH_INT: intsrc83 { vector = <0x1540>; }; + USBH_OHCI: intsrc84 { vector = <0x1560>; }; + USBH_EHCI: intsrc85 { vector = <0x1580>; }; + USBH_PME: intsrc86 { vector = <0x15A0>; }; + USBH_BIND: intsrc87 { vector = <0x15C0>; }; + RSPI_OVRF: intsrc88 { vector = <0x1780>; }; + RSPI_SPTEF: intsrc89 { vector = <0x17A0>; }; + RSPI_SPRF: intsrc90 { vector = <0x17C0>; }; + SPU2_0: intsrc91 { vector = <0x1800>; }; + SPU2_1: intsrc92 { vector = <0x1820>; }; + FSI: intsrc93 { vector = <0x1840>; }; + FMSI: intsrc94 { vector = <0x1860>; }; + HDMI_SSS: intsrc95 { vector = <0x18A0>; }; + HDMI_KEY: intsrc96 { vector = <0x18C0>; }; + IPMMU: intsrc97 { vector = <0x1920>; }; + AP_ARM_CTIIRQ: intsrc98 { vector = <0x1980>; }; + AP_ARM_PMURQ: intsrc99 { vector = <0x19A0>; }; + MFIS2: intsrc100 { vector = <0x1A00>; }; + CPORTR2S: intsrc101 { vector = <0x1A20>; }; + CMT14: intsrc102 { vector = <0x1A40>; }; + CMT15: intsrc103 { vector = <0x1A60>; }; + MMCIF_0: intsrc104 { vector = <0x1AA0>; }; + MMCIF_1: intsrc105 { vector = <0x1AC0>; }; + MMCIF_2: intsrc106 { vector = <0x1AE0>; }; + SIM_ERI: intsrc107 { vector = <0x1C00>; }; + SIM_RXI: intsrc108 { vector = <0x1C20>; }; + SIM_TXI: intsrc109 { vector = <0x1C40>; }; + SIM_TEI: intsrc110 { vector = <0x1C60>; }; + STPRO_0: intsrc111 { vector = <0x1C80>; }; + STPRO_1: intsrc112 { vector = <0x1CA0>; }; + STPRO_2: intsrc113 { vector = <0x1CC0>; }; + STPRO_3: intsrc114 { vector = <0x1CE0>; }; + STPRO_4: intsrc115 { vector = <0x1D00>; }; + + DMAC1_1: intc_group0 { + group = <&DMAC1_1_DEI0 &DMAC1_1_DEI1 + &DMAC1_1_DEI2 &DMAC1_1_DEI3>; + }; + + DMAC1_2: intc_group1 { + group = <&DMAC1_2_DEI4 &DMAC1_2_DEI5 + &DMAC1_2_DADERR>; + }; + + DMAC2_1: intc_group2 { + group = <&DMAC2_1_DEI0 &DMAC2_1_DEI1 + &DMAC2_1_DEI2 &DMAC2_1_DEI3>; + }; + + DMAC2_2: intc_group3 { + group = <&DMAC2_2_DEI4 &DMAC2_2_DEI5 + &DMAC2_2_DADERR>; + }; + + DMAC3_1: intc_group4 { + group = <&DMAC3_1_DEI0 &DMAC3_1_DEI1 + &DMAC3_1_DEI2 &DMAC3_1_DEI3>; + }; + + DMAC3_2: intc_group5 { + group = <&DMAC3_2_DEI4 &DMAC3_2_DEI5 + &DMAC3_2_DADERR>; + }; + + AP_ARM1: intc_group6 { + group = <&AP_ARM_COMMTX &AP_ARM_COMMRX>; + }; + + AP_ARM2: intc_group7 { + group = <&AP_ARM_CTIIRQ &AP_ARM_PMURQ>; + }; + + USBF: intc_group8 { + group = <&USBF_OUL_SOF &USBF_IXL_INT>; + }; + + SDHI0: intc_group9 { + group = <&SDHI0_0 &SDHI0_1 &SDHI0_2 &SDHI0_3>; + }; + + SDHI1: intc_group10 { + group = <&SDHI1_0 &SDHI1_1 &SDHI1_2 &SDHI1_3>; + }; + + SDHI2: intc_group11 { + group = <&SDHI2_0 &SDHI2_1 &SDHI2_2 &SDHI2_3>; + }; + + SHWYSTAT: intc_group12 { + group = <&SHWYSTAT_RT &SHWYSTAT_HS &SHWYSTAT_COM>; + }; + + USBH1: intc_group13 { + group = <&USBH_INT &USBH_OHCI>; + }; + + USBH2: intc_group14 { + group = <&USBH_EHCI &USBH_PME &USBH_BIND>; + }; + + RSPI: intc_group15 { + group = <&RSPI_OVRF &RSPI_SPTEF &RSPI_SPRF>; + }; + + SPU2: intc_group16 { + group = <&SPU2_0 &SPU2_1>; + }; + + FLCTL: intc_group17 { + group = <&FLCTL_FLSTEI &FLCTL_FLTENDI &FLCTL_FLTREQ0I + &FLCTL_FLTREQ1I>; + }; + + IIC1: intc_group18 { + group = <&IIC1_ALI &IIC1_TACKI &IIC1_WAITI &IIC1_DTEI>; + }; + + intc_vectors { + vector_table = <&DIRC &ATAPI &IIC1_ALI &IIC1_TACKI &IIC1_WAITI + &IIC1_DTEI &AP_ARM_COMMTX &AP_ARM_COMMRX &MFI &MFIS &BBIF1 + &BBIF2 &USBHSDMAC &USBF_OUL_SOF &USBF_IXL_INT &SGX540 &CMT1_0 + &CMT1_1 &CMT1_2 &CMT1_3 &CMT2 &CMT3 &KEYSC &SCIFA0 &SCIFA1 + &SCIFA2 &SCIFA3 &MSIOF2 &MSIOF1 &SCIFA4 &SCIFA5 &SCIFB + &FLCTL_FLSTEI &FLCTL_FLTENDI &FLCTL_FLTREQ0I &FLCTL_FLTREQ1I + &SDHI0_0 &SDHI0_1 &SDHI0_2 &SDHI0_3 + &SDHI1_0 &SDHI1_1 &SDHI1_2 &SDHI1_3 + &AP_ARM_L2CINT &IRDA &TPU0 &SCIFA6 &SCIFA7 + &GETHER &ICBS0 &DDM &SDHI2_0 &SDHI2_1 &SDHI2_2 &SDHI2_3 + &RWDT0 + &DMAC1_1_DEI0 &DMAC1_1_DEI1 &DMAC1_1_DEI2 &DMAC1_1_DEI3 + &DMAC1_2_DEI4 &DMAC1_2_DEI5 &DMAC1_2_DADERR + &DMAC2_1_DEI0 &DMAC2_1_DEI1 &DMAC2_1_DEI2 &DMAC2_1_DEI3 + &DMAC2_2_DEI4 &DMAC2_2_DEI5 &DMAC2_2_DADERR + &DMAC3_1_DEI0 &DMAC3_1_DEI1 &DMAC3_1_DEI2 &DMAC3_1_DEI3 + &DMAC3_2_DEI4 &DMAC3_2_DEI5 &DMAC3_2_DADERR + &SHWYSTAT_RT &SHWYSTAT_HS &SHWYSTAT_COM + &USBH_INT &USBH_OHCI &USBH_EHCI &USBH_PME &USBH_BIND + &HDMI + &RSPI_OVRF &RSPI_SPTEF &RSPI_SPRF + &SPU2_0 &SPU2_1 &FSI &FMSI &HDMI_SSS &HDMI_KEY + &IPMMU &AP_ARM_CTIIRQ &AP_ARM_PMURQ &MFIS2 + &CPORTR2S + &CMT14 &CMT15 &MMCIF_0 &MMCIF_1 &MMCIF_2 + &SIM_ERI &SIM_RXI &SIM_TXI &SIM_TEI + &STPRO_0 &STPRO_1 &STPRO_2 &STPRO_3 &STPRO_4>; + }; + + intc_mask_registers { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + intc_mask0 { + reg = <0xe6940080 1>, <0xe69400c0 1>; + reginfo = <&DMAC2_1_DEI3 &DMAC2_1_DEI2 &DMAC2_1_DEI1 + &DMAC2_1_DEI0 0 0 &AP_ARM_COMMTX &AP_ARM_COMMRX>; + }; + + intc_mask1 { + reg = <0xe6940084 1>, <0xe69400c4 1>; + reginfo = <&ATAPI 0 &DIRC 0 &DMAC1_1_DEI3 &DMAC1_1_DEI2 + &DMAC1_1_DEI1 &DMAC1_1_DEI0>; + }; + + intc_mask2 { + reg = <0xe6940088 1>, <0xe69400c8 1>; + reginfo = <0 0 0 0 &BBIF1 &BBIF2 &MFIS &MFI>; + }; + + intc_mask3 { + reg = <0xe694008c 1>, <0xe69400cc 1>; + reginfo = <&DMAC3_1_DEI3 &DMAC3_1_DEI2 &DMAC3_1_DEI1 + &DMAC3_1_DEI0 &DMAC3_2_DADERR &DMAC3_2_DEI5 + &DMAC3_2_DEI4 &IRDA>; + }; + + intc_mask4 { + reg = <0xe6940090 1>, <0xe69400d0 1>; + reginfo = <&DDM 0 0 0 0 0 0 0>; + }; + + intc_mask5 { + reg = <0xe6940094 1>, <0xe69400d4 1>; + reginfo = <&KEYSC &DMAC1_2_DADERR &DMAC1_2_DEI5 &DMAC1_2_DEI4 + &SCIFA3 &SCIFA2 &SCIFA1 &SCIFA0>; + }; + + intc_mask6 { + reg = <0xe6940098 1>, <0xe69400d8 1>; + reginfo = <&SCIFB &SCIFA5 &SCIFA4 &MSIOF1 0 0 &MSIOF2 0>; + }; + + intc_mask7 { + reg = <0xe694009c 1>, <0xe69400dc 1>; + reginfo = <&SDHI0_3 &SDHI0_2 &SDHI0_1 &SDHI0_0 &FLCTL_FLTREQ1I + &FLCTL_FLTREQ0I &FLCTL_FLTENDI &FLCTL_FLSTEI>; + }; + + intc_mask8 { + reg = <0xe69400a0 1>, <0xe69400e0 1>; + reginfo = <&SDHI1_3 &SDHI1_2 &SDHI1_1 &SDHI1_0 0 + &USBHSDMAC 0 &AP_ARM_L2CINT>; + }; + + intc_mask9 { + reg = <0xe69400a4 1>, <0xe69400e4 1>; + reginfo = <&CMT1_3 &CMT1_2 &CMT1_1 + &CMT1_0 &CMT2 &USBF_IXL_INT &USBF_OUL_SOF &SGX540>; + }; + + intc_mask10 { + reg = <0xe69400a8 1>, <0xe69400e8 1>; + reginfo = <0 &DMAC2_2_DADERR &DMAC2_2_DEI5 &DMAC2_2_DEI4 + 0 0 0 0>; + }; + + intc_mask11 { + reg = <0xe69400ac 1>, <0xe69400ec 1>; + reginfo = <&IIC1_DTEI &IIC1_WAITI + &IIC1_TACKI &IIC1_ALI &ICBS0 0 0 0>; + }; + + intc_mask12 { + reg = <0xe69400b0 1>, <0xe69400f0 1>; + reginfo = <0 0 &TPU0 &SCIFA6 &SCIFA7 &GETHER 0 0>; + }; + + intc_mask13 { + reg = <0xe69400b4 1>, <0xe69400f4 1>; + reginfo = <&SDHI2_3 &SDHI2_2 &SDHI2_1 + &SDHI2_0 0 &CMT3 0 &RWDT0>; + }; + + intc_mask14 { + reg = <0xe6950080 1>, <0xe69500c0 1>; + reginfo = <&SHWYSTAT_RT &SHWYSTAT_HS + &SHWYSTAT_COM 0 0 0 0 0>; + }; + + intc_mask15 { + reg = <0xe6950088 1>, <0xe69500c8 1>; + reginfo = <0 0 &USBH_INT &USBH_OHCI + &USBH_EHCI &USBH_PME &USBH_BIND 0>; + }; + + intc_mask16 { + reg = <0xe6950090 1>, <0xe69500d0 1>; + reginfo = <&HDMI 0 0 0 &RSPI_OVRF + &RSPI_SPTEF &RSPI_SPRF 0>; + }; + + intc_mask17 { + reg = <0xe6950094 1>, <0xe69500d4 1>; + reginfo = <&SPU2_0 &SPU2_1 &FSI &FMSI 0 + &HDMI_SSS &HDMI_KEY 0>; + }; + + intc_mask18 { + reg = <0xe6950098 1>, <0xe69500d8 1>; + reginfo = <0 &IPMMU 0 0 &AP_ARM_CTIIRQ + &AP_ARM_PMURQ 0 0>; + }; + + intc_mask19 { + reg = <0xe695009c 1>, <0xe69500dc 1>; + reginfo = <&MFIS2 &CPORTR2S &CMT14 &CMT15 + 0 &MMCIF_0 &MMCIF_1 &MMCIF_2>; + }; + + intc_mask20 { + reg = <0xe69500a4 1>, <0xe69500e4 1>; + reginfo = <&SIM_ERI &SIM_RXI &SIM_TXI + &SIM_TEI &STPRO_0 &STPRO_1 &STPRO_2 &STPRO_3>; + }; + + intc_mask21 { + reg = <0xe69500a8 1>, <0xe69500e8 1>; + reginfo = <&STPRO_4 0 0 0 0 0 0 0>; + }; + }; + + intc_prio_registers { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + intc_prio0 { + reg = <0xe6940000 2>, <0x0 0>; + field-width = <4>; + reginfo = <&DMAC3_1 &DMAC3_2 &CMT2 &ICBS0>; + }; + + intc_prio1 { + reg = <0xe6940004 2>, <0x0 0>; + field-width = <4>; + reginfo =<&IRDA 0 &BBIF1 &BBIF2>; + }; + + intc_prio2 { + reg = <0xe6940008 2>, <0x0 0>; + field-width = <4>; + reginfo = <&ATAPI 0 &CMT1_1 &AP_ARM1>; + }; + + intc_prio3 { + reg = <0xe694000c 2>, <0x0 0>; + field-width = <4>; + reginfo = <0 0 &CMT1_2 0>; + }; + + intc_prio4 { + reg = <0xe6940010 2>, <0x0 0>; + field-width = <4>; + reginfo = <&DMAC1_1 &MFIS &MFI &USBF>; + }; + + intc_prio5 { + reg = <0xe6940014 2>, <0x0 0>; + field-width = <4>; + reginfo = <&KEYSC &DMAC1_2 &SGX540 &CMT1_0>; + }; + + intc_prio6 { + reg = <0xe6940018 2>, <0x0 0>; + field-width = <4>; + reginfo = <&SCIFA0 &SCIFA1 &SCIFA2 &SCIFA3>; + }; + + intc_prio7 { + reg = <0xe694001c 2>, <0x0 0>; + field-width = <4>; + reginfo = <&MSIOF2 &USBHSDMAC &FLCTL &SDHI0>; + }; + + intc_prio8 { + reg = <0xe6940020 2>, <0x0 0>; + field-width = <4>; + reginfo = <&MSIOF1 &SCIFA4 0 &IIC1>; + }; + + intc_prio9 { + reg = <0xe6940024 2>, <0x0 0>; + field-width = <4>; + reginfo = <&DMAC2_1 &DMAC2_2 &AP_ARM_L2CINT 0>; + }; + + intc_prio10 { + reg = <0xe6940028 2>, <0x0 0>; + field-width = <4>; + reginfo = <0 &CMT1_3 0 &SDHI1>; + }; + + intc_prio11 { + reg = <0xe694002c 2>, <0x0 0>; + field-width = <4>; + reginfo = <&TPU0 &SCIFA6 &SCIFA7 &GETHER>; + }; + + intc_prio12 { + reg = <0xe6940030 2>, <0x0 0>; + field-width = <4>; + reginfo = <0 &CMT3 0 &RWDT0>; + }; + + intc_prio13 { + reg = <0xe6940034 2>, <0x0 0>; + field-width = <4>; + reginfo = <&SCIFB &SCIFA5 0 &DDM>; + }; + + intc_prio14 { + reg = <0xe6940038 2>, <0x0 0>; + field-width = <4>; + reginfo = <0 0 &DIRC &SDHI2>; + }; + + intc_prio15 { + reg = <0xe6950000 2>, <0x0 0>; + field-width = <4>; + reginfo = <&SHWYSTAT 0 0 0>; + }; + + intc_prio16 { + reg = <0xe6950010 2>, <0x0 0>; + field-width = <4>; + reginfo = <&USBH1 0 0 0>; + }; + + intc_prio17 { + reg = <0xe6950014 2>, <0x0 0>; + field-width = <4>; + reginfo = <&USBH2 0 0 0>; + }; + + intc_prio18 { + reg = <0xe6950020 2>, <0x0 0>; + field-width = <4>; + reginfo = <&HDMI 0 0 0>; + }; + + intc_prio19 { + reg = <0xe6950024 2>, <0x0 0>; + field-width = <4>; + reginfo = <&RSPI 0 0 0>; + }; + + intc_prio20 { + reg = <0xe6950028 2>, <0x0 0>; + field-width = <4>; + reginfo = <&SPU2 0 &FSI &FMSI>; + }; + + intc_prio21 { + reg = <0xe695002c 2>, <0x0 0>; + field-width = <4>; + reginfo = <0 &HDMI_SSS &HDMI_KEY 0>; + }; + + intc_prio22 { + reg = <0xe6950030 2>, <0x0 0>; + field-width = <4>; + reginfo = <&IPMMU 0 0 0>; + }; + + intc_prio23 { + reg = <0xe6950034 2>, <0x0 0>; + field-width = <4>; + reginfo = <&AP_ARM2 0 0 0>; + }; + + intc_prio24 { + reg = <0xe6950038 2>, <0x0 0>; + field-width = <4>; + reginfo = <&MFIS2 &CPORTR2S &CMT14 &CMT15>; + }; + + intc_prio25 { + reg = <0xe695003c 2>, <0x0 0>; + field-width = <4>; + reginfo = <0 &MMCIF_0 &MMCIF_1 &MMCIF_2>; + }; + + intc_prio26 { + reg = <0xe6950048 2>, <0x0 0>; + field-width = <4>; + reginfo = <&SIM_ERI &SIM_RXI &SIM_TXI &SIM_TEI>; + }; + + intc_prio27 { + reg = <0xe695004c 2>, <0x0 0>; + field-width = <4>; + reginfo = <&STPRO_0 &STPRO_1 &STPRO_2 &STPRO_3>; + }; + + intc_prio28 { + reg = <0xe6950050 2>, <0x0 0>; + field-width = <4>; + reginfo = <&STPRO_4 0 0 0>; + }; + }; + }; + + intca_irq_pins: interrupt-controller@1{ + compatible = "renesas,sh_intc"; + interrupt-controller; + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <1>; + ranges; + + reg = <0xe6900000 0x6c>; + + IRQ0: intsrc1 { vector = <0x200>; }; + IRQ1: intsrc2 { vector = <0x220>; }; + IRQ2: intsrc3 { vector = <0x240>; }; + IRQ3: intsrc4 { vector = <0x260>; }; + IRQ4: intsrc5 { vector = <0x280>; }; + IRQ5: intsrc6 { vector = <0x2a0>; }; + IRQ6: intsrc7 { vector = <0x2c0>; }; + IRQ7: intsrc8 { vector = <0x2e0>; }; + IRQ8: intsrc9 { vector = <0x300>; }; + IRQ9: intsrc10 { vector = <0x320>; }; + IRQ10: intsrc11 { vector = <0x340>; }; + IRQ11: intsrc12 { vector = <0x360>; }; + IRQ12: intsrc13 { vector = <0x380>; }; + IRQ13: intsrc14 { vector = <0x3a0>; }; + IRQ14: intsrc15 { vector = <0x3c0>; }; + IRQ15: intsrc16 { vector = <0x3e0>; }; + IRQ16: intsrc17 { vector = <0x3200>; }; + IRQ17: intsrc18 { vector = <0x3220>; }; + IRQ18: intsrc19 { vector = <0x3240>; }; + IRQ19: intsrc20 { vector = <0x3260>; }; + IRQ20: intsrc21 { vector = <0x3280>; }; + IRQ21: intsrc22 { vector = <0x32a0>; }; + IRQ22: intsrc23 { vector = <0x32c0>; }; + IRQ23: intsrc24 { vector = <0x32e0>; }; + IRQ24: intsrc25 { vector = <0x3300>; }; + IRQ25: intsrc26 { vector = <0x3320>; }; + IRQ26: intsrc27 { vector = <0x3340>; }; + IRQ27: intsrc28 { vector = <0x3360>; }; + IRQ28: intsrc29 { vector = <0x3380>; }; + IRQ29: intsrc30 { vector = <0x33a0>; }; + IRQ30: intsrc31 { vector = <0x33c0>; }; + IRQ31: intsrc32 { vector = <0x33e0>; }; + + intc_vectors { + vector_table = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 + &IRQ6 &IRQ7 &IRQ8 &IRQ9 &IRQ10 + &IRQ11 &IRQ12 &IRQ13 &IRQ14 &IRQ15 + &IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20 + &IRQ21 &IRQ22 &IRQ23 &IRQ24 &IRQ25 + &IRQ26 &IRQ27 &IRQ28 &IRQ29 &IRQ30 + &IRQ31>; + }; + + intc_mask_registers { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + intc_mask0 { + reg = <0xe6900040 1>, <0xe6900060 1>; + reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 + &IRQ5 &IRQ6 &IRQ7>; + }; + + intc_mask1 { + reg = <0xe6900044 1>, <0xe6900064 1>; + reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11 + &IRQ12 &IRQ13 &IRQ14 &IRQ15>; + }; + + intc_mask2 { + reg = <0xe6900048 1>, <0xe6900068 1>; + reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 + &IRQ20 &IRQ21 &IRQ22 &IRQ23>; + }; + + intc_mask3 { + reg = <0xe690004C 1>, <0xe690006C 1>; + reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27 + &IRQ28 &IRQ29 &IRQ30 &IRQ31>; + }; + }; + + intc_prio_registers { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + intc_prio0 { + reg = <0xe6900010 4>, <0x0 0>; + field-width = <4>; + reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 &IRQ6 &IRQ7>; + }; + + intc_prio1 { + reg = <0xe6900014 4>, <0x0 0>; + field-width = <4>; + reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11 + &IRQ12 &IRQ13 &IRQ14 &IRQ15>; + }; + + intc_prio2 { + reg = <0xe6900018 4>, <0x0 0>; + field-width = <4>; + reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 + &IRQ20 &IRQ21 &IRQ22 &IRQ23>; + }; + + intc_prio3 { + reg = <0xe690001C 4>, <0x0 0>; + field-width = <4>; + reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27 + &IRQ28 &IRQ29 &IRQ30 &IRQ31>; + }; + }; + + intc_sense_registers { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + intc_sense0 { + reg = <0xe6900000 4>; + field-width = <4>; + reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 &IRQ6 &IRQ7>; + }; + + intc_sense1 { + reg = <0xe6900004 4>; + field-width = <4>; + reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11 + &IRQ12 &IRQ13 &IRQ14 &IRQ15>; + }; + + intc_sense2 { + reg = <0xe6900008 4>; + field-width = <4>; + reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 + &IRQ20 &IRQ21 &IRQ22 &IRQ23>; + }; + + intc_sense3 { + reg = <0xe690000C 4>; + field-width = <4>; + reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27 + &IRQ28 &IRQ29 &IRQ30 &IRQ31>; + }; + }; + + intc_ack_registers { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + intc_ack0 { + reg = <0xe6900020 1>, <0x0 0>; + reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 &IRQ6 &IRQ7>; + }; + + intc_ack1 { + reg = <0xe6900024 1>, <0x0 0>; + reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11 + &IRQ12 &IRQ13 &IRQ14 &IRQ15>; + }; + + intc_ack2 { + reg = <0xe6900028 1>, <0x0 0>; + reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 + &IRQ20 &IRQ21 &IRQ22 &IRQ23>; + }; + + intc_ack3 { + reg = <0xe690002C 1>, <0x0 0>; + reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27 + &IRQ28 &IRQ29 &IRQ30 &IRQ31>; + }; + }; + }; + + intcs: interrupt-controller@2{ + compatible = "renesas,sh_intc"; + interrupt-controller; + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <1>; + ranges; + + reg = <0xffd20000 0x200>, <0xffd50000 0x200>; + group_size = <3>; + + INTCS: intsrc1 { vector = <0x0F80>; }; + VPU5HA2: intsrc2 { vector = <0x3c80>; }; + _2DG_TRAP: intsrc3 { vector = <0x3ca0>; }; + _2DG_GPM_INT:intsrc4 { vector = <0x3cc0>; }; + _2DG_CER_INT:intsrc5 { vector = <0x3ce0>; }; + VPU5F: intsrc6 { vector = <0x3d80>; }; + _2DG_BRK_INT:intsrc7 { vector = <0x3da0>; }; + IIC0_ALI: intsrc8 { vector = <0x4200>; }; + IIC0_TACKI: intsrc9 { vector = <0x4220>; }; + IIC0_WAITI: intsrc10 { vector = <0x4240>; }; + IIC0_DTEI: intsrc11 { vector = <0x4260>; }; + TMU0_0: intsrc12 { vector = <0x4280>; }; + TMU0_1: intsrc13 { vector = <0x42a0>; }; + TMU0_2: intsrc14 { vector = <0x42c0>; }; + CMT0: intsrc15 { vector = <0x4300>; }; + LMB: intsrc16 { vector = <0x4360>; }; + CTI: intsrc17 { vector = <0x3800>; }; + VOU: intsrc18 { vector = <0x3820>; }; + ICB: intsrc19 { vector = <0x3880>; }; + VIO6C: intsrc20 { vector = <0x38e0>; }; + CEU20: intsrc21 { vector = <0x3900>; }; + CEU21: intsrc22 { vector = <0x3920>; }; + JPU: intsrc23 { vector = <0x3960>; }; + LCDC0: intsrc24 { vector = <0x3980>; }; + LCRC: intsrc25 { vector = <0x39a0>; }; + LCDC1: intsrc26 { vector = <0x4b80>; }; + TMU1_0: intsrc27 { vector = <0x4d00>; }; + TMU1_1: intsrc28 { vector = <0x4d20>; }; + TMU1_2: intsrc29 { vector = <0x4d40>; }; + CMT4: intsrc30 { vector = <0x4d80>; }; + DISP: intsrc31 { vector = <0x4da0>; }; + DSRV: intsrc32 { vector = <0x4dc0>; }; + CPORTS2R: intsrc33 { vector = <0x4e20>; }; + + /* Group */ + _2DG1: intc_group0 { group = <&_2DG_CER_INT &_2DG_GPM_INT &_2DG_TRAP>; }; + IIC0: intc_group1 { group = <&IIC0_DTEI &IIC0_WAITI &IIC0_TACKI &IIC0_ALI>; }; + TMU1: intc_group2 { group = <&TMU1_0 &TMU1_1 &TMU1_2>; }; + + intc_vectors { + + vector_table = <&VPU5HA2 &_2DG_TRAP &_2DG_GPM_INT + &_2DG_CER_INT &VPU5F &_2DG_BRK_INT &IIC0_ALI &IIC0_TACKI + &IIC0_WAITI &IIC0_DTEI &TMU0_0 &TMU0_1 &TMU0_2 &CMT0 + &LMB &CTI &VOU &ICB &VIO6C &CEU20 &CEU21 &JPU &LCDC0 + &LCRC &LCDC1 &TMU1_0 &TMU1_1 &TMU1_2 &CMT4 &DISP &DSRV + &CPORTS2R &INTCS>; + }; + + + intc_mask_registers { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + intc_mask0 { + reg = <0xffd20184 1>, <0xffd201c4 1>; + reginfo = <&_2DG_CER_INT &_2DG_GPM_INT &_2DG_TRAP &VPU5HA2 + 0 0 0 0>; + }; + + intc_mask1 { + reg = <0xffd20188 1>, <0xffd201c8 1>; + reginfo = <0 0 &CEU21 &VPU5F 0 0 0 0>; + }; + + intc_mask2 { + reg = <0xffd2018c 1>, <0xffd201cc 1>; + reginfo = <0 0 0 0 &VIO6C 0 0 &ICB>; + }; + + intc_mask3 { + reg = <0xffd20190 1>, <0xffd201d0 1>; + reginfo = <0 0 &VOU &CTI &JPU 0 &LCRC &LCDC0>; + }; + + intc_mask4 { + reg = <0xffd2019c 1>, <0xffd201dc 1>; + reginfo = <0 &TMU0_2 &TMU0_1 &TMU0_0 0 0 0 0>; + }; + + intc_mask5 { + reg = <0xffd201a0 1>, <0xffd201e0 1>; + reginfo = <0 0 0 0 &CEU20 0 0 0>; + }; + + intc_mask6 { + reg = <0xffd201a4 1>, <0xffd201e4 1>; + reginfo = <0 0 0 &CMT0 0 0 0 0>; + }; + + intc_mask7 { + reg = <0xffd201ac 1>, <0xffd201ec 1>; + reginfo = <&IIC0_DTEI &IIC0_WAITI &IIC0_TACKI &IIC0_ALI + 0 &_2DG_BRK_INT &LMB 0>; + }; + + intc_mask8 { + reg = <0xffd50190 1>, <0xffd501d0 1>; + reginfo = <0 0 0 0 &LCDC1 0 0 0>; + }; + + intc_mask9 { + reg = <0xffd50198 1>, <0xffd501d8 1>; + reginfo = <&TMU1_0 &TMU1_1 &TMU1_2 0 &CMT4 &DISP &DSRV 0>; + }; + + intc_mask10 { + reg = <0xffd5019c 1>, <0xffd501dc 1>; + reginfo = <0 &CPORTS2R 0 0 0 0 0 0>; + }; + + intc_mask11 { + reg = <0xffd20104 2>, <0x00000000 0>; + reginfo = <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 &INTCS>; + }; + }; + + intc_prio_registers { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + intc_prio0 { + reg = <0xffd20000 2>, <0x0 0>; + field-width = <4>; + reginfo = <&CTI &VOU 0 &ICB>; + }; + + intc_prio1 { + reg = <0xffd20004 2>, <0x0 0>; + field-width = <4>; + reginfo = <&JPU &LCDC0 0 &LCRC>; + }; + + intc_prio2 { + reg = <0xffd20010 2>, <0x0 0>; + field-width = <4>; + reginfo = <0 &VPU5HA2 0 &VPU5F>; + }; + + intc_prio3 { + reg = <0xffd20014 2>, <0x0 0>; + field-width = <4>; + reginfo = <0 0 0 &CMT0>; + }; + + intc_prio4 { + reg = <0xffd20018 2>, <0x0 0>; + field-width = <4>; + reginfo = <&TMU0_0 &TMU0_1 &TMU0_2 &_2DG1>; + }; + + intc_prio5 { + reg = <0xffd2001c 2>, <0x0 0>; + field-width = <4>; + reginfo = <0 0 0 &_2DG_BRK_INT>; + }; + + intc_prio6 { + reg = <0xffd20020 2>, <0x0 0>; + field-width = <4>; + reginfo = <0 0 0 &IIC0>; + }; + + intc_prio7 { + reg = <0xffd20024 2>, <0x0 0>; + field-width = <4>; + reginfo = <&CEU20 0 0 0>; + }; + + intc_prio8 { + reg = <0xffd20028 2>, <0x0 0>; + field-width = <4>; + reginfo = <&VIO6C 0 &LMB 0>; + }; + + intc_prio9 { + reg = <0xffd2002c 2>, <0x0 0>; + field-width = <4>; + reginfo = <0 0 &CEU21 0>; + }; + + intc_prio10 { + reg = <0xffd50024 2>, <0x0 0>; + field-width = <4>; + reginfo = <&LCDC1 0 0 0>; + }; + + intc_prio11 { + reg = <0xffd50030 2>, <0x0 0>; + field-width = <4>; + reginfo = <&TMU1 0 0 0>; + }; + + intc_prio12 { + reg = <0xffd50034 2>, <0x0 0>; + field-width = <4>; + reginfo = <&CMT4 &DISP &DSRV 0>; + }; + + intc_prio13 { + reg = <0xffd50038 2>, <0x0 0>; + field-width = <4>; + reginfo = <0 &CPORTS2R 0 0>; + }; + }; + + intc_intevtsa { + vector = <&INTCS>; + }; + }; + }; };