@@ -7,10 +7,7 @@ is managed by DT, in order to maintain compatibility.
Main node required properties:
-- compatible : should be one of:
- "renesas,sh_intca"
- "renesas,sh_intcs"
- "renesas,sh_intca_irq_pins"
+- compatible : "renesas,sh_intc"
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Set already 1.
@@ -100,18 +97,10 @@ Optional:
This node required properties:
* vector : This specifies the address phandle of INTCS.
-Note:
-- "renesas,sh_intca" needs group_size, intc_group*, intc_vectors,
- intc_mask_registers and intc_prio_registers.
-- "renesas,sh_intcs" needs group_size, intc_group*, intc_vectors,
- intc_mask_registers, intc_prio_registers and intc_intevtsa.
-- "renesas,sh_intca_irq_pins" needs intc_vectors, intc_mask_registers,
- intc_prio_registers, intc_sense_registers and intc_ack_registers.
-
Example:
intca: interrupt-controller@0 {
- compatible = "renesas,sh_intca";
+ compatible = "renesas,sh_intc";
interrupt-controller;
#address-cells = <1>;
#size-cells = <1>;
@@ -311,7 +311,7 @@ int __init register_intc_controller(struct intc_desc *desc)
BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
- intc_irq_domain_init(d, hw);
+ intc_irq_domain_init(d, hw, desc->of_node);
/* register the vectors one by one */
for (i = 0; i < hw->nr_vectors; i++) {
@@ -190,7 +190,8 @@ void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d,
intc_enum enum_id, int enable);
/* irqdomain.c */
-void intc_irq_domain_init(struct intc_desc_int *d, struct intc_hw_desc *hw);
+void intc_irq_domain_init(struct intc_desc_int *d, struct intc_hw_desc *hw,
+ struct device_node *of_node);
/* virq.c */
void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d);
@@ -42,7 +42,7 @@ static const struct irq_domain_ops intc_evt_ops = {
};
void __init intc_irq_domain_init(struct intc_desc_int *d,
- struct intc_hw_desc *hw)
+ struct intc_hw_desc *hw, struct device_node *np)
{
unsigned int irq_base, irq_end;
@@ -59,10 +59,10 @@ void __init intc_irq_domain_init(struct intc_desc_int *d,
* tree penalty for linear cases with non-zero hwirq bases.
*/
if (irq_base == 0 && irq_end == (irq_base + hw->nr_vectors - 1))
- d->domain = irq_domain_add_linear(NULL, hw->nr_vectors,
+ d->domain = irq_domain_add_linear(np, hw->nr_vectors,
&intc_evt_ops, NULL);
else
- d->domain = irq_domain_add_tree(NULL, &intc_evt_ops, NULL);
+ d->domain = irq_domain_add_tree(np, &intc_evt_ops, NULL);
BUG_ON(!d->domain);
}
@@ -530,49 +530,6 @@ void __init of_sh_intc_get_skip_syscore_suspend(struct device_node *np,
d->skip_syscore_suspend = false;
}
-int __init of_sh_intc_get_meminfo(struct device_node *np,
- struct resource *res, int res_no)
-{
- int ret = 0, i;
-
- for (i = 0 ; i < res_no ; i++) {
- ret = of_address_to_resource(np, i, &res[i]);
- if (ret) {
- pr_err("could not determine device base address\n");
- return ret;
- }
-
- pr_debug("%s: Address 0x%x, size %d\n",
- __func__, res[i].start, resource_size(&res[i]));
- }
-
- return ret;
-}
-
-int __init of_sh_intc_get_pint(struct device_node *np, struct intc_desc *d)
-{
- /* pint uses vector, mask and sence. */
- int ret = of_sh_intc_get_vector(np, &d->hw.vectors,
- &d->hw.nr_vectors);
- if (ret)
- return ret;
-
- ret = of_sh_intc_get_mask(np, &d->hw.mask_regs,
- &d->hw.nr_mask_regs);
- if (ret)
- return ret;
-
- ret = of_sh_intc_get_sense(np, &d->hw.sense_regs,
- &d->hw.nr_sense_regs);
- /* INTC may not need Sence register. */
- if (ret && ret != -ENOENT)
- return ret;
-
- d->of_node = np;
-
- return 0;
-}
-
int __init of_sh_intc_get_intc(struct device_node *np, struct intc_desc *d)
{
int ret = of_sh_intc_get_vector(np, &d->hw.vectors,
@@ -612,36 +569,3 @@ int __init of_sh_intc_get_intc(struct device_node *np, struct intc_desc *d)
return 0;
}
-
-int __init of_sh_intc_get_intc_pins(struct device_node *np,
- struct intc_desc *d)
-{
- int ret = of_sh_intc_get_vector(np, &d->hw.vectors,
- &d->hw.nr_vectors);
- if (ret)
- return ret;
-
- ret = of_sh_intc_get_mask(np, &d->hw.mask_regs,
- &d->hw.nr_mask_regs);
- if (ret)
- return ret;
-
- ret = of_sh_intc_get_prio(np, &d->hw.prio_regs,
- &d->hw.nr_prio_regs);
- if (ret)
- return ret;
-
- ret = of_sh_intc_get_sense(np, &d->hw.sense_regs,
- &d->hw.nr_sense_regs);
- if (ret)
- return ret;
-
- ret = of_sh_intc_get_ack(np, &d->hw.ack_regs,
- &d->hw.nr_ack_regs);
- if (ret)
- return ret;
-
- d->of_node = np;
-
- return 0;
-}
@@ -118,6 +118,7 @@ struct intc_desc {
intc_enum force_disable;
bool skip_syscore_suspend;
struct intc_hw_desc hw;
+ struct device_node *of_node;
};
#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
@@ -160,26 +161,6 @@ static inline int register_intc_userimask(unsigned long addr)
int of_sh_intc_get_intc(struct device_node *np, struct intc_desc *d);
/*
- * of_sh_initc_get_intc_pins() - Get INTC Pins table.
- * @np: device node to get INTC from
- * @d: a pointer of intc pins table
- *
- * Return: one of the errno value on the error condition
- */
-int of_sh_intc_get_intc_pins(struct device_node *np, struct intc_desc *d);
-
-/*
- * of_sh_intc_get_meminfo() - Get and set INTC register of memory.
- * @np: device node to get INTC from
- * @res_mem: a pointer of resource
- * @res_no: resource number
- *
- * Return: one of the errno value on the error condition
- */
-int of_sh_intc_get_meminfo(struct device_node *np,
- struct resource *res_mem, int resno);
-
-/*
* of_sh_intc_get_force_enable - Get and set force_enable vector in
* struct intc_desc.
* @np: device node to get INTC from
@@ -220,13 +201,5 @@ void of_sh_intc_get_skip_syscore_suspend(struct device_node *np,
* Return: one of the errno value on the error condition
*/
int of_sh_intc_get_intevtsa_vect(struct device_node *np, unsigned short *vect);
-/*
- * of_sh_initc_get_intc_pint() - Get INTC Pint table.
- * @np: device node to get INTC from
- * @d: a pointer of intc pint table
- *
- * Return: one of the errno value on the error condition
- */
-int of_sh_intc_get_pint(struct device_node *np, struct intc_desc *d);
#endif /* __SH_INTC_H */