From patchwork Fri Dec 21 09:45:12 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 1902671 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 6545ADF25A for ; Fri, 21 Dec 2012 09:49:11 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TlzB4-0005jv-Fw; Fri, 21 Dec 2012 09:46:02 +0000 Received: from mail-pb0-f44.google.com ([209.85.160.44]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TlzAf-0005g1-GI for linux-arm-kernel@lists.infradead.org; Fri, 21 Dec 2012 09:45:39 +0000 Received: by mail-pb0-f44.google.com with SMTP id uo1so2618907pbc.17 for ; Fri, 21 Dec 2012 01:45:36 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=+R+qWenCgQkQj/hiyCSF69k1z51IZXLYMhp0baaLZ4w=; b=eVdHPpicVQclLda8MqkOF9AIoYkCe0iWRB4kTT5itFsMaWPGyPRPtsD8xzHq940xrC tQs/s+EQd+H269LdeDg9gXVEVvHsqwKVvHZCO+6lLlRb9RdNQqgmDW++g3NqscXUI72A QcpT1ERd6ASbF9rtS2LQBoas8YVCyu11BjYKNQ0CipzqrpOpUCwOlfSREbfQC+pgyf17 2yGmIfy+cyFFJtKEI8cC/UCGqmaKBa/zZPy5QUI1qhLf5wbw+iRjrBXeafYzUMa4MzL6 ivoj8qe1Cx8QC1/9f6HhS3DjlDjCwYmhYJQH508S4ynRdtpO5F6/82kw2AToTxQfK3Ct fLWQ== X-Received: by 10.66.88.129 with SMTP id bg1mr35423344pab.71.1356083135999; Fri, 21 Dec 2012 01:45:35 -0800 (PST) Received: from localhost.localdomain ([116.224.148.148]) by mx.google.com with ESMTPS id t5sm7104258paw.20.2012.12.21.01.45.32 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 21 Dec 2012 01:45:35 -0800 (PST) From: Haojian Zhuang To: linus.walleij@linaro.org, tony@atomide.com, linux-arm-kernel@lists.infradead.org, swarren@nvidia.com Subject: [PATCH v6 2/8] ARM: dts: support pinctrl single in pxa910 Date: Fri, 21 Dec 2012 17:45:12 +0800 Message-Id: <1356083118-18857-3-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1356083118-18857-1-git-send-email-haojian.zhuang@linaro.org> References: <1356083118-18857-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQmkV4mh3F4ly62GbNiMjwBdARU0uAXQskv6AJUgnJe9YFNF5u6kR2vYELNr2fMztWKUA1Dt X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121221_044537_802182_730A2C10 X-CRM114-Status: GOOD ( 11.96 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.44 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add pinctrl-single support with device tree in pxa910 dkb platform. Signed-off-by: Haojian Zhuang --- arch/arm/boot/dts/pxa910-dkb.dts | 204 +++++++++++++++++++++++++++++++++++++- arch/arm/boot/dts/pxa910.dtsi | 68 +++++++++++++ 2 files changed, 271 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/pxa910-dkb.dts b/arch/arm/boot/dts/pxa910-dkb.dts index 595492a..76e9c8d 100644 --- a/arch/arm/boot/dts/pxa910-dkb.dts +++ b/arch/arm/boot/dts/pxa910-dkb.dts @@ -24,10 +24,212 @@ soc { apb@d4000000 { - uart1: uart@d4017000 { + pmx: pinmux@d401e000 { + pinctrl-names = "default"; + pinctrl-0 = <&board_pins>; + + board_pins: pinmux_board_pins { + /* pins not owned by device driver */ + /* w1 */ + pinctrl-single,pins = < + 0x0cc 0x2 /* CLK_REQ_W1 */ + >; + pinctrl-single,power-source = <0x1000 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + 0x198 0x6 /* GPIO47_UART1_RXD */ + 0x19c 0x6 /* GPIO48_UART1_TXD */ + >; + /* power source, mask */ + pinctrl-single,power-source = <0x1000 0x1800>; + /* bias, mask, disable, pull down, pull up */ + pinctrl-single,bias = <0xc000 0xe000 0 0xa000 0xc000>; + /* input schmitt, mask, disable */ + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + 0x150 0x4 /* GPIO29_UART2_CTS */ + 0x154 0x4 /* GPIO30_UART2_RTS */ + 0x158 0x4 /* GPIO31_UART2_TXD */ + 0x15c 0x4 /* GPIO32_UART2_RXD */ + >; + pinctrl-single,power-source = <0x1000 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x188 0x7 /* GPIO43_UART3_RXD */ + 0x18c 0x7 /* GPIO44_UART3_TXD */ + >; + pinctrl-single,power-source = <0x1000 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + twsi1_pins: pinmux_twsi1_pins { + pinctrl-single,pins = < + 0x1b0 0x2 /* GPIO53_TWSI_SCL */ + 0x1b4 0x2 /* GPIO54_TWSI_SDA */ + >; + pinctrl-single,power-source = <0x1000 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + nand_pins: pinmux_nand_pins { + pinctrl-single,pins = < + 0x040 0x0 /* ND_IO0 */ + 0x03c 0x0 /* ND_IO1 */ + 0x038 0x0 /* ND_IO2 */ + 0x034 0x0 /* ND_IO3 */ + 0x030 0x0 /* ND_IO4 */ + 0x02c 0x0 /* ND_IO5 */ + 0x028 0x0 /* ND_IO6 */ + 0x024 0x0 /* ND_IO7 */ + 0x020 0x0 /* ND_IO8 */ + 0x01c 0x0 /* ND_IO9 */ + 0x018 0x0 /* ND_IO10 */ + 0x014 0x0 /* ND_IO11 */ + 0x010 0x0 /* ND_IO12 */ + 0x00c 0x0 /* ND_IO13 */ + 0x008 0x0 /* ND_IO14 */ + 0x004 0x0 /* ND_IO15 */ + 0x044 0x0 /* ND_nCS0 */ + 0x060 0x1 /* ND_ALE */ + 0x05c 0x0 /* ND_CLE */ + 0x054 0x1 /* ND_nWE */ + 0x058 0x1 /* ND_nRE */ + 0x068 0x0 /* ND_RDY0 */ + >; + pinctrl-single,power-source = <0x1000 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + mmc1_ldata_pins: pinmux_mmc1_ldata_pins { + pinctrl-single,pins = < + 0x0a0 0x0 /* MMC1_DATA0 */ + 0x09c 0x0 /* MMC1_DATA1 */ + 0x098 0x0 /* MMC1_DATA2 */ + 0x094 0x0 /* MMC1_DATA3 */ + >; + pinctrl-single,power-source = <0x1800 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + mmc1_hdata_pins: pinmux_mmc1_hdata_pins { + pinctrl-single,pins = < + 0x090 0x0 /* MMC1_DATA4 */ + 0x08c 0x0 /* MMC1_DATA5 */ + 0x088 0x0 /* MMC1_DATA6 */ + 0x084 0x0 /* MMC1_DATA7 */ + >; + pinctrl-single,power-source = <0x1000 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + mmc1_clk_pins: pinmux_mmc1_clk_pins { + pinctrl-single,pins = < + 0x0a4 0x0 /* MMC1_CMD */ + 0x0a8 0x0 /* MMC1_CLK */ + >; + pinctrl-single,power-source = <0x1800 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + mmc1_cd_pins: pinmux_mmc1_cd_pins { + pinctrl-single,pins = < + 0x0ac 0x0 /* MMC1_CD */ + 0x0b0 0x0 /* MMC1_WP */ + >; + pinctrl-single,power-source = <0x1000 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + mmc2_pins: pinmux_mmc2_pins { + pinctrl-single,pins = < + 0x180 0x1 /* MMC2_CMD */ + 0x184 0x1 /* MMC2_CLK */ + 0x17c 0x1 /* MMC2_DATA0 */ + 0x178 0x1 /* MMC2_DATA1 */ + 0x174 0x1 /* MMC2_DATA2 */ + 0x170 0x1 /* MMC2_DATA3 */ + >; + pinctrl-single,power-source = <0x1000 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + ssp1_pins: pinmux_ssp1_pins { + pinctrl-single,pins = < + 0x130 0x1 /* GPIO21_SSP1_SCLK */ + 0x134 0x1 /* GPIO22_SSP1_FRM */ + 0x138 0x1 /* GPIO23_SSP1_TXD */ + 0x13c 0x1 /* GPIO24_SSP1_RXD */ + >; + pinctrl-single,power-source = <0x1000 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + keypad_pins: pinmux_keypad_pins { + pinctrl-single,pins = < + 0x0dc 0x1 /* GPIO0_MKIN0 */ + 0x0e0 0x1 /* GPIO1_MKOUT0 */ + 0x0e4 0x1 /* GPIO2_MKIN1 */ + 0x0e8 0x1 /* GPIO3_MKOUT1 */ + 0x0ec 0x1 /* GPIO4_MKIN2 */ + 0x0f0 0x1 /* GPIO5_MKOUT2 */ + 0x0f4 0x1 /* GPIO6_MKIN3 */ + 0x0f8 0x1 /* GPIO7_MKOUT3 */ + 0x0fc 0x1 /* GPIO8_MKIN4 */ + 0x100 0x1 /* GPIO9_MKOUT4 */ + 0x10c 0x1 /* GPIO12_MKIN6 */ + >; + pinctrl-single,power-source = <0x1000 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + nfc_pins: pinmux_nfc_pins { + pinctrl-single,pins = < + 0x120 0x0 /* GPIO17 */ + >; + pinctrl-single,power-source = <0x1000 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + wlan_pins: pinmux_wlan_pins { + pinctrl-single,pins = < + 0x114 0x0 /* GPIO14 */ + 0x12c 0x0 /* GPIO20 */ + 0x160 0x0 /* GPIO33 */ + 0x164 0x0 /* GPIO34 */ + 0x168 0x0 /* GPIO35 */ + 0x16c 0x0 /* GPIO36 */ + >; + pinctrl-single,power-source = <0x1000 0x1800>; + pinctrl-single,bias = <0 0xe000 0 0xa000 0xc000>; + pinctrl-single,input-schmitt = <0x40 0x70 0x40>; + }; + }; + uart1: uart@d4017000 { /* FFUART */ + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; + }; + uart2: uart@d4018000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; + }; + uart3: uart@d4036000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; status = "okay"; }; twsi1: i2c@d4011000 { + pinctrl-names = "default"; + pinctrl-0 = <&twsi1_pins>; status = "okay"; pmic: 88pm860x@34 { diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi index 825aaca..c2f8b21 100644 --- a/arch/arm/boot/dts/pxa910.dtsi +++ b/arch/arm/boot/dts/pxa910.dtsi @@ -54,6 +54,74 @@ reg = <0xd4000000 0x00200000>; ranges; + pmx: pinmux@d401e000 { + compatible = "pinconf-single"; + reg = <0xd401e000 0x0330>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <7>; + + range0: range@d401e0dc { + /* GPIO0 ~ GPIO54 */ + reg = <0xd401e0dc 0xdc>; + /* gpio base & gpio func */ + pinctrl-single,gpio = <0 0>; + }; + range1: range@d401e2f0 { + /* GPIO55 ~ GPIO59 */ + reg = <0xd401e2f0 0x14>; + pinctrl-single,gpio = <55 1>; + }; + range2: range@d401e304 { + /* GPIO60 ~ GPIO66 */ + reg = <0xd401e304 0x1c>; + pinctrl-single,gpio = <60 0>; + }; + range3: range@d401e1b8 { + /* GPIO67 ~ GPIO109 */ + reg = <0xd401e1b8 0xac>; + pinctrl-single,gpio = <67 0>; + }; + range4: range@d401e298 { + /* GPIO110 ~ GPIO116 */ + reg = <0xd401e298 0x1c>; + pinctrl-single,gpio = <110 0>; + }; + range5: range@d401e0b4 { + /* GPIO117 ~ GPIO120 */ + reg = <0xd401e0b4 0x10>; + pinctrl-single,gpio = <117 1>; + }; + range6: range@d401e32c { + /* GPIO121 */ + reg = <0xd401e32c 0x04>; + pinctrl-single,gpio = <121 0>; + }; + range7: range@d401e0c8 { + /* GPIO122 ~ GPIO123 */ + reg = <0xd401e0c8 0x08>; + pinctrl-single,gpio = <122 1>; + }; + range8: range@d401e0d0 { + /* GPIO124 */ + reg = <0xd401e0d0 0x04>; + pinctrl-single,gpio = <124 0>; + }; + range9: range@d401e0d4 { + /* GPIO125 */ + reg = <0xd401e0d4 0x04>; + pinctrl-single,gpio = <125 1>; + }; + range10: range@d401e06c { + /* GPIO126 ~ GPIO127 */ + reg = <0xd401e06c 0x08>; + pinctrl-single,gpio = <126 0>; + }; + }; + timer0: timer@d4014000 { compatible = "mrvl,mmp-timer"; reg = <0xd4014000 0x100>;