From patchwork Sun Dec 23 11:05:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Gaikwad X-Patchwork-Id: 1907051 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id D4001DF25A for ; Sun, 23 Dec 2012 11:14:18 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TmjSH-0005L1-9d; Sun, 23 Dec 2012 11:10:53 +0000 Received: from hqemgate03.nvidia.com ([216.228.121.140]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TmjPr-00049L-1D for linux-arm-kernel@lists.infradead.org; Sun, 23 Dec 2012 11:08:24 +0000 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Sun, 23 Dec 2012 03:11:57 -0800 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp08.nvidia.com (PGP Universal service); Sun, 23 Dec 2012 03:08:18 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Sun, 23 Dec 2012 03:08:18 -0800 Received: from localhost.localdomain (172.20.144.16) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server (TLS) id 8.3.279.1; Sun, 23 Dec 2012 03:08:17 -0800 From: Prashant Gaikwad To: , Subject: [PATCH 09/11] clk: tegra: add dt support Date: Sun, 23 Dec 2012 16:35:49 +0530 Message-ID: <1356260751-3667-10-git-send-email-pgaikwad@nvidia.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1356260751-3667-1-git-send-email-pgaikwad@nvidia.com> References: <1356260751-3667-1-git-send-email-pgaikwad@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121223_060823_352816_70B0E462 X-CRM114-Status: GOOD ( 11.93 ) X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [216.228.121.140 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-tegra@vger.kernel.org, Prashant Gaikwad , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add support to initialize clock from DT. Signed-off-by: Prashant Gaikwad --- drivers/clk/tegra/clk.c | 23 +++++++++++++++++++++++ drivers/clk/tegra/clk.h | 2 ++ include/linux/clk/tegra.h | 1 + 3 files changed, 26 insertions(+), 0 deletions(-) diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c index cf023a9..314d5bd 100644 --- a/drivers/clk/tegra/clk.c +++ b/drivers/clk/tegra/clk.c @@ -67,3 +67,26 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl, } } } + +static const struct of_device_id tegra_dt_clk_match[] = { + { .compatible = "nvidia,tegra20-car", .data = tegra20_clock_init }, + { .compatible = "nvidia,tegra30-car", .data = tegra30_clock_init }, + { } +}; + +void __init tegra_dt_init_clk(void) +{ + struct device_node *np; + const struct of_device_id *match; + of_tegra_clk_init_func_t clk_init_func; + + np = of_find_matching_node(NULL, tegra_dt_clk_match); + if (!np) + return; + + match = of_match_node(tegra_dt_clk_match, np); + + clk_init_func = match->data; + + clk_init_func(np); +} diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index f1ed1d0..ca1f0e4 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -20,6 +20,8 @@ #include #include +typedef void (*of_tegra_clk_init_func_t)(struct device_node *); + /** * struct tegra_clk_sync_source - external clock source from codec * diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h index c1ed98f..93a38b6 100644 --- a/include/linux/clk/tegra.h +++ b/include/linux/clk/tegra.h @@ -81,6 +81,7 @@ static inline void tegra_disable_cpu_clock(u32 cpu) tegra_cpu_car_ops->disable_clock(cpu); } +void tegra_dt_init_clk(void); void tegra20_cpu_car_ops_init(void); void tegra30_cpu_car_ops_init(void);