From patchwork Mon Jan 7 11:21:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Baltieri X-Patchwork-Id: 1940681 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id F3E7BDF230 for ; Mon, 7 Jan 2013 11:27:18 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TsAnY-0000RN-EK; Mon, 07 Jan 2013 11:23:21 +0000 Received: from mail-we0-f177.google.com ([74.125.82.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TsAnU-0000Ql-Gx for linux-arm-kernel@lists.infradead.org; Mon, 07 Jan 2013 11:23:17 +0000 Received: by mail-we0-f177.google.com with SMTP id x48so9837448wey.22 for ; Mon, 07 Jan 2013 03:23:14 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=sd4E13P6XwGP/u5kosoqzF0mpbddS3k2ucFsUjX9Z90=; b=JPFHMin4bFtdRybCVzlTCahXS5yNc/U4dq0hBup9GEQvKCXHiKhJCGEX5jOV/Nea7C hcBSvF8DVikHkTMoyNrbIWMUAStCoONpQ37fhwi/N2pv/EPvc2DVffe3R8zk60J4pNwm CvvNkJpj55RxJ6AESNj80neGCS9wSEdvnLGHBhcTEUqgbINWK55DjGWAJsd+7sisDDgP pRHEG9s/hQIn+BqtgLtDJ17JqaZiEWaDDSXIdvdHYQN/LORgMjeyUNxD6vdVEn7wC2YC mp1gZ8VLrzAJA921Ol7aN+2cVLRR+aFBq1VIOsa0MXJxscyMRizQJ1Aos12xLe2Bfcpw 1o6g== X-Received: by 10.180.33.202 with SMTP id t10mr8789432wii.3.1357557794781; Mon, 07 Jan 2013 03:23:14 -0800 (PST) Received: from localhost ([2a01:2029:1:11e3:8e70:5aff:feac:ad8]) by mx.google.com with ESMTPS id s16sm12134962wii.0.2013.01.07.03.23.08 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 07 Jan 2013 03:23:13 -0800 (PST) From: Fabio Baltieri To: Vinod Koul Subject: [PATCH 01/16] dmaengine: ste_dma40: reset priority bit for logical channels Date: Mon, 7 Jan 2013 12:21:43 +0100 Message-Id: <1357557718-15676-2-git-send-email-fabio.baltieri@linaro.org> X-Mailer: git-send-email 1.7.12.1 In-Reply-To: <1357557718-15676-1-git-send-email-fabio.baltieri@linaro.org> References: <1357557718-15676-1-git-send-email-fabio.baltieri@linaro.org> X-Gm-Message-State: ALoCoQlJasPXumal9VWLBmchZYXrBeY6O5j2eLYQ2o72anqZDem0RojnS0WTNxSVP2l1QY5MK9O4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130107_062316_727490_75F446AF X-CRM114-Status: GOOD ( 11.81 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.177 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Srinidhi Kasagar , Fabio Baltieri , Narayanan , linux-kernel@vger.kernel.org, Dan Williams , Linus Walleij , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Narayanan This patch sets the SSCFG/SDCFG bit[7] PRI only for physical channel requests with high priority. For logical channels, this bit will be zero. Signed-off-by: Narayanan G Reviewed-by: Rabin Vincent Acked-by: Linus Walleij Signed-off-by: Fabio Baltieri --- drivers/dma/ste_dma40_ll.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c index 851ad56..d64b72a 100644 --- a/drivers/dma/ste_dma40_ll.c +++ b/drivers/dma/ste_dma40_ll.c @@ -102,17 +102,18 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg, src |= cfg->src_info.data_width << D40_SREG_CFG_ESIZE_POS; dst |= cfg->dst_info.data_width << D40_SREG_CFG_ESIZE_POS; + /* Set the priority bit to high for the physical channel */ + if (cfg->high_priority) { + src |= 1 << D40_SREG_CFG_PRI_POS; + dst |= 1 << D40_SREG_CFG_PRI_POS; + } + } else { /* Logical channel */ dst |= 1 << D40_SREG_CFG_LOG_GIM_POS; src |= 1 << D40_SREG_CFG_LOG_GIM_POS; } - if (cfg->high_priority) { - src |= 1 << D40_SREG_CFG_PRI_POS; - dst |= 1 << D40_SREG_CFG_PRI_POS; - } - if (cfg->src_info.big_endian) src |= 1 << D40_SREG_CFG_LBE_POS; if (cfg->dst_info.big_endian)