From patchwork Thu Jan 10 08:35:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Chen X-Patchwork-Id: 1958671 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 064AEDF264 for ; Thu, 10 Jan 2013 08:40:11 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TtDd6-0001Nh-Bm; Thu, 10 Jan 2013 08:36:52 +0000 Received: from co1ehsobe006.messaging.microsoft.com ([216.32.180.189] helo=co1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TtDco-0001De-E4 for linux-arm-kernel@lists.infradead.org; Thu, 10 Jan 2013 08:36:36 +0000 Received: from mail215-co1-R.bigfish.com (10.243.78.203) by CO1EHSOBE014.bigfish.com (10.243.66.77) with Microsoft SMTP Server id 14.1.225.23; Thu, 10 Jan 2013 08:36:30 +0000 Received: from mail215-co1 (localhost [127.0.0.1]) by mail215-co1-R.bigfish.com (Postfix) with ESMTP id E31C17E02D1; Thu, 10 Jan 2013 08:36:29 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1ee6h1de0h1202h1e76h1d1ah1d2ahzz8275bhz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h1354h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1155h) Received: from mail215-co1 (localhost.localdomain [127.0.0.1]) by mail215-co1 (MessageSwitch) id 1357806987232265_433; Thu, 10 Jan 2013 08:36:27 +0000 (UTC) Received: from CO1EHSMHS022.bigfish.com (unknown [10.243.78.200]) by mail215-co1.bigfish.com (Postfix) with ESMTP id 33E22D6004B; Thu, 10 Jan 2013 08:36:27 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO1EHSMHS022.bigfish.com (10.243.66.32) with Microsoft SMTP Server (TLS) id 14.1.225.23; Thu, 10 Jan 2013 08:36:26 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.2.318.3; Thu, 10 Jan 2013 08:36:25 +0000 Received: from localhost.localdomain (nchen-desktop.ap.freescale.net [10.192.242.40]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r0A8ZtR6001462; Thu, 10 Jan 2013 01:36:19 -0700 From: Peter Chen To: , , , , , , , Subject: [PATCH 2/4] usb: mxs-phy: Change mxs phy clock usage Date: Thu, 10 Jan 2013 16:35:52 +0800 Message-ID: <1357806954-27960-2-git-send-email-peter.chen@freescale.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1357806954-27960-1-git-send-email-peter.chen@freescale.com> References: <1357806954-27960-1-git-send-email-peter.chen@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130110_033635_406084_7416F21D X-CRM114-Status: GOOD ( 14.25 ) X-Spam-Score: 0.4 (/) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (0.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- 3.0 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.180.189 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: marex@denx.de, m.grzeschik@pengutronix.de, linux-doc@vger.kernel.org, matt@genesi-usa.com, devicetree-discuss@lists.ozlabs.org, linux-usb@vger.kernel.org, mkl@pengutronix.de, maxime.ripard@free-electrons.com, festevam@gmail.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org As we mark mxs-phy as dummy clock for i.mx6q, we only need to enable it at probe, this clock doesn't need to be managed by clock framework. Signed-off-by: Peter Chen --- drivers/usb/otg/mxs-phy.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 44 insertions(+), 0 deletions(-) diff --git a/drivers/usb/otg/mxs-phy.c b/drivers/usb/otg/mxs-phy.c index 7630272..7dca384 100644 --- a/drivers/usb/otg/mxs-phy.c +++ b/drivers/usb/otg/mxs-phy.c @@ -20,6 +20,9 @@ #include #include #include +#include +#include +#include #define DRIVER_NAME "mxs_phy" @@ -108,6 +111,7 @@ static int mxs_phy_probe(struct platform_device *pdev) void __iomem *base; struct clk *clk; struct mxs_phy *mxs_phy; + struct regmap *anatop; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { @@ -146,6 +150,46 @@ static int mxs_phy_probe(struct platform_device *pdev) platform_set_drvdata(pdev, &mxs_phy->phy); + /* + * At mx6x, USB PHY PLL and its output gate is controlled by hardware. + * It just needs to open at init, if the usb device is + * in suspend, it will close related PLL automatically. + */ + + anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop"); + +#define CTRL_SET 0x4 +#define CTRL_CLR 0x8 + +#define BM_ANADIG_USB_PLL_480_CTRL_BYPASS (1 << 16) +#define BM_ANADIG_USB_PLL_480_CTRL_ENABLE (1 << 13) +#define BM_ANADIG_USB_PLL_480_CTRL_POWER (1 << 12) +#define BM_ANADIG_USB_PLL_480_CTRL_EN_USB_CLKS (1 << 6) + + if (!IS_ERR(anatop)) { + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + u32 phy_reg_offset; + int ret; + + ret = of_property_read_u32(np, "anatop-phy-reg-offset", + &phy_reg_offset); + if (ret) { + dev_err(dev, "no anatop-phy-reg-offset property set\n"); + return -EINVAL; + } + + regmap_write(anatop, phy_reg_offset + 0x8, + BM_ANADIG_USB_PLL_480_CTRL_BYPASS); + regmap_write(anatop, phy_reg_offset + 0x4, + BM_ANADIG_USB_PLL_480_CTRL_ENABLE + | BM_ANADIG_USB_PLL_480_CTRL_POWER + | BM_ANADIG_USB_PLL_480_CTRL_EN_USB_CLKS); + + } else { + pr_warn("failed to find fsl,imx6q-anatop regmap\n"); + } + return 0; }