From patchwork Fri Jan 11 05:48:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Porter X-Patchwork-Id: 1964301 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id A54A83FF0F for ; Fri, 11 Jan 2013 05:51:16 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TtXSj-00052G-V1; Fri, 11 Jan 2013 05:47:31 +0000 Received: from mail-qa0-f52.google.com ([209.85.216.52]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TtXQ2-0003s6-7J for linux-arm-kernel@lists.infradead.org; Fri, 11 Jan 2013 05:44:43 +0000 Received: by mail-qa0-f52.google.com with SMTP id d13so1227345qak.18 for ; Thu, 10 Jan 2013 21:44:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=TUa0G2tg3+snwQvKnoXoimPac9JxkDeCw2q8I6fm44g=; b=0oUQIhDigXqWy0bdt7YVMrSo08E/9Hjf4mK7XdBjrWCA3sV63Pggw3kpb4n5Emlsi1 MNEnHcrTzvMfgswbmw0lp/FS5VQfAvuAt6PTHHR3U4mS6AfdRoPvzS2C78nrTmxljsSJ M7tyOYZpdEh+zEZXXBg51ytBUoaahp1qWt3HrSgHlx21gS1fRDEdKGkUiKC+OBt9qOlf rWCdMdoXWh3R2Xhr4AacTxtz2KTOKvvGJGJO9WemMFK6odbeFYAZBgXVTrUdZi7Akn9L Es6jpg67TGY6jxIL2NP+uVXxSgeZ7CU6gzv9OB7XB+dopVSSk0dEyMVJge6xdchb+E3P aDWw== X-Received: by 10.224.31.209 with SMTP id z17mr59808086qac.28.1357883081682; Thu, 10 Jan 2013 21:44:41 -0800 (PST) Received: from beef.ohporter.com (cpe-24-166-64-7.neo.res.rr.com. [24.166.64.7]) by mx.google.com with ESMTPS id ds8sm1897114qab.18.2013.01.10.21.44.38 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 10 Jan 2013 21:44:40 -0800 (PST) From: Matt Porter To: Tony Lindgren , Sekhar Nori , Grant Likely , Mark Brown , Benoit Cousson , Russell King , Vinod Koul , Rob Landley , Chris Ball Subject: [PATCH v4 09/14] mmc: omap_hsmmc: set max_segs based on dma engine limitations Date: Fri, 11 Jan 2013 00:48:45 -0500 Message-Id: <1357883330-5364-10-git-send-email-mporter@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1357883330-5364-1-git-send-email-mporter@ti.com> References: <1357883330-5364-1-git-send-email-mporter@ti.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130111_004442_422502_277BE8AD X-CRM114-Status: GOOD ( 13.79 ) X-Spam-Score: 0.4 (/) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (0.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.216.52 listed in list.dnswl.org] 3.0 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (ohiomdp[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Linux DaVinci Kernel List , Arnd Bergmann , Linux Documentation List , Devicetree Discuss , Linux MMC List , Linux Kernel Mailing List , Rob Herring , Dan Williams , Linux SPI Devel List , Linux OMAP List , Linux ARM Kernel List X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The EDMA DMAC has a hardware limitation that prevents supporting scatter gather lists with any number of segments. The DMA Engine API reports the maximum number of segments a channel can support via the optional dma_get_channel_caps() API. If the nr_segs capability is present, the value is used to configure mmc->max_segs appropriately. Signed-off-by: Matt Porter Acked-by: Tony Lindgren --- drivers/mmc/host/omap_hsmmc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index e79b12d..f74bd69 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -1769,6 +1769,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev) const struct of_device_id *match; dma_cap_mask_t mask; unsigned tx_req, rx_req; + struct dmaengine_chan_caps *dma_chan_caps; struct pinctrl *pinctrl; match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); @@ -1935,6 +1936,11 @@ static int omap_hsmmc_probe(struct platform_device *pdev) goto err_irq; } + /* Some DMA Engines only handle a limited number of SG segments */ + dma_chan_caps = dma_get_channel_caps(host->rx_chan, DMA_DEV_TO_MEM); + if (dma_chan_caps && dma_chan_caps->seg_nr) + mmc->max_segs = dma_chan_caps->seg_nr; + /* Request IRQ for MMC operations */ ret = request_irq(host->irq, omap_hsmmc_irq, 0, mmc_hostname(mmc), host);