From patchwork Thu Jan 17 14:03:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 1996601 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id CE88E3FC85 for ; Thu, 17 Jan 2013 14:06:28 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Tvq3h-0000bl-Jb; Thu, 17 Jan 2013 14:03:09 +0000 Received: from va3ehsobe005.messaging.microsoft.com ([216.32.180.31] helo=va3outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Tvq3e-0000bR-7o for linux-arm-kernel@lists.infradead.org; Thu, 17 Jan 2013 14:03:06 +0000 Received: from mail242-va3-R.bigfish.com (10.7.14.251) by VA3EHSOBE002.bigfish.com (10.7.40.22) with Microsoft SMTP Server id 14.1.225.23; Thu, 17 Jan 2013 14:03:04 +0000 Received: from mail242-va3 (localhost [127.0.0.1]) by mail242-va3-R.bigfish.com (Postfix) with ESMTP id 1F642540277; Thu, 17 Jan 2013 14:03:04 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1ee6h1de0h1202h1e76h1d1ah1d2ahzz8275dhz2dh87h2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail242-va3 (localhost.localdomain [127.0.0.1]) by mail242-va3 (MessageSwitch) id 1358431381446739_6046; Thu, 17 Jan 2013 14:03:01 +0000 (UTC) Received: from VA3EHSMHS020.bigfish.com (unknown [10.7.14.250]) by mail242-va3.bigfish.com (Postfix) with ESMTP id 619E0B40050; Thu, 17 Jan 2013 14:03:01 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS020.bigfish.com (10.7.99.30) with Microsoft SMTP Server (TLS) id 14.1.225.23; Thu, 17 Jan 2013 14:02:53 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.2.318.3; Thu, 17 Jan 2013 14:02:52 +0000 Received: from S2101-09.ap.freescale.net ([10.192.185.104]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id r0HE2m2g030478; Thu, 17 Jan 2013 07:02:49 -0700 From: Shawn Guo To: Linus Walleij Subject: [PATCH 1/2 RESEND] gpio: fix warning of 'struct gpio_chip' declaration Date: Thu, 17 Jan 2013 22:03:22 +0800 Message-ID: <1358431402-29701-1-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1358239056-703-2-git-send-email-shawn.guo@linaro.org> References: <1358239056-703-2-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130117_090306_439042_F36D1039 X-CRM114-Status: GOOD ( 13.97 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.180.31 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Grant Likely , Chris Ball , linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The struct gpio_chip is only defined inside #ifdef CONFIG_GPIOLIB, but it's referenced by gpiochip_add_pin_range() and gpiochip_remove_pin_ranges() which are outside #ifdef CONFIG_GPIOLIB. Thus, we see the following warning when building blackfin image, where GPIOLIB is not required. CC arch/blackfin/kernel/bfin_gpio.o CC init/version.o In file included from arch/blackfin/include/asm/gpio.h:321, from arch/blackfin/kernel/bfin_gpio.c:15: include/asm-generic/gpio.h:298: warning: 'struct gpio_chip' declared inside parameter list include/asm-generic/gpio.h:298: warning: its scope is only this definition or declaration, which is probably not what you want include/asm-generic/gpio.h:304: warning: 'struct gpio_chip' declared inside parameter list Move pinctrl trunk into #ifdef CONFIG_GPIOLIB to fix the warning, since it appears that pinctrl gpio range support depends on GPIOLIB. Signed-off-by: Shawn Guo --- include/asm-generic/gpio.h | 74 ++++++++++++++++++++++---------------------- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index 20ca766..2341014 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -212,6 +212,43 @@ extern void gpio_unexport(unsigned gpio); #endif /* CONFIG_GPIO_SYSFS */ +#ifdef CONFIG_PINCTRL + +/** + * struct gpio_pin_range - pin range controlled by a gpio chip + * @head: list for maintaining set of pin ranges, used internally + * @pctldev: pinctrl device which handles corresponding pins + * @range: actual range of pins controlled by a gpio controller + */ + +struct gpio_pin_range { + struct list_head node; + struct pinctrl_dev *pctldev; + struct pinctrl_gpio_range range; +}; + +int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, + unsigned int gpio_offset, unsigned int pin_offset, + unsigned int npins); +void gpiochip_remove_pin_ranges(struct gpio_chip *chip); + +#else + +static inline int +gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, + unsigned int gpio_offset, unsigned int pin_offset, + unsigned int npins) +{ + return 0; +} + +static inline void +gpiochip_remove_pin_ranges(struct gpio_chip *chip) +{ +} + +#endif /* CONFIG_PINCTRL */ + #else /* !CONFIG_GPIOLIB */ static inline bool gpio_is_valid(int number) @@ -270,41 +307,4 @@ static inline void gpio_unexport(unsigned gpio) } #endif /* CONFIG_GPIO_SYSFS */ -#ifdef CONFIG_PINCTRL - -/** - * struct gpio_pin_range - pin range controlled by a gpio chip - * @head: list for maintaining set of pin ranges, used internally - * @pctldev: pinctrl device which handles corresponding pins - * @range: actual range of pins controlled by a gpio controller - */ - -struct gpio_pin_range { - struct list_head node; - struct pinctrl_dev *pctldev; - struct pinctrl_gpio_range range; -}; - -int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, - unsigned int gpio_offset, unsigned int pin_offset, - unsigned int npins); -void gpiochip_remove_pin_ranges(struct gpio_chip *chip); - -#else - -static inline int -gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, - unsigned int gpio_offset, unsigned int pin_offset, - unsigned int npins) -{ - return 0; -} - -static inline void -gpiochip_remove_pin_ranges(struct gpio_chip *chip) -{ -} - -#endif /* CONFIG_PINCTRL */ - #endif /* _ASM_GENERIC_GPIO_H */