From patchwork Fri Jan 18 07:31:11 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 1999741 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 9F9B2DF280 for ; Fri, 18 Jan 2013 07:36:39 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Tw6Su-0006rx-A9; Fri, 18 Jan 2013 07:34:16 +0000 Received: from mail-da0-f49.google.com ([209.85.210.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Tw6Qc-0005d1-23 for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2013 07:31:55 +0000 Received: by mail-da0-f49.google.com with SMTP id v40so1507557dad.36 for ; Thu, 17 Jan 2013 23:31:52 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=tpaRlel8pIDrPdIpXRI92vf1F9r5fo+htOozVBh55vs=; b=Y8c2CMngsUmp9xirEU1lfVbGuhmyOVYlqhjSIn2y3zIM9arHIVKBDtmbH8d67Otrzk MtLpIDZVElLooVrE7lTN1k1ehhJXfPlfCfceiFuAZ7Jttsbj6X3pAowfSJtNA/YzfeWn Fw0o0gcw4+AoOxEhWIN6AjtrV+FIcWjf22Fh3LaRrgnBZBQUee7WqNRpAj56G8SUKvXF +/xyFifWu/OTZ4AYBIKhQIzP8bYVU5vdlOxtFrvFECCqMHmyIq1uFZ6AEbcP0psIA0Nc XOSPEwzjGeZwu6KiCLzQvGDwcAEud5O5R4npcDseMsD8isiopd5eVSLCq0YX65MdFZXV Hkig== X-Received: by 10.66.76.97 with SMTP id j1mr21261657paw.70.1358494312565; Thu, 17 Jan 2013 23:31:52 -0800 (PST) Received: from localhost.localdomain ([98.126.173.75]) by mx.google.com with ESMTPS id i6sm2922899paw.19.2013.01.17.23.31.49 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 17 Jan 2013 23:31:51 -0800 (PST) From: Haojian Zhuang To: linus.walleij@linaro.org, linux@arm.linux.org.uk, tony@atomide.com, linux-arm-kernel@lists.infradead.org, swarren@nvidia.com Subject: [PATCH v7 07/15] gpio: pl061: allocate irq dynamically Date: Fri, 18 Jan 2013 15:31:11 +0800 Message-Id: <1358494279-16503-8-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1358494279-16503-1-git-send-email-haojian.zhuang@linaro.org> References: <1358494279-16503-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQnB+WEQjSo21fnR4RS14BBsTcyTHHhUWw0LUGO7c+qxEOF99G+yJMh+Xdd8PJe1p43ce4ga X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130118_023154_237035_AB7B6F8A X-CRM114-Status: GOOD ( 13.79 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org In original implementation, irq base is always specified in platform data. If it's not specified, pl061 gpio driver can't pass the probe() function since irq base is missing. While moving to device tree, everything should be parsed from DTS file. So allocate irq dynamically for irq base. Signed-off-by: Haojian Zhuang --- drivers/gpio/gpio-pl061.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index c1720de..8336719 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -211,6 +212,10 @@ static void __init pl061_init_gc(struct pl061_gpio *chip, int irq_base) IRQ_GC_INIT_NESTED_LOCK, IRQ_NOREQUEST, 0); } +static const struct irq_domain_ops pl061_domain_ops = { + .xlate = irq_domain_xlate_twocell, +}; + static int pl061_probe(struct amba_device *adev, const struct amba_id *id) { struct device *dev = &adev->dev; @@ -225,10 +230,14 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) if (pdata) { chip->gc.base = pdata->gpio_base; chip->irq_base = pdata->irq_base; - } else if (adev->dev.of_node) { + } else { chip->gc.base = -1; - chip->irq_base = 0; - } else + chip->irq_base = irq_alloc_descs(-1, 0, PL061_GPIO_NR, 0); + if (chip->irq_base < 0) + return chip->irq_base; + } + if (!irq_domain_add_legacy(adev->dev.of_node, PL061_GPIO_NR, + chip->irq_base, 0, &pl061_domain_ops, chip)) return -ENODEV; if (!devm_request_mem_region(dev, adev->res.start,