From patchwork Tue Jan 22 08:25:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Inderpal Singh X-Patchwork-Id: 2017041 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 083833FD1A for ; Tue, 22 Jan 2013 08:28:12 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TxZAZ-0003pM-Q7; Tue, 22 Jan 2013 08:25:23 +0000 Received: from mail-pb0-f51.google.com ([209.85.160.51]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TxZAW-0003na-H6 for linux-arm-kernel@lists.infradead.org; Tue, 22 Jan 2013 08:25:21 +0000 Received: by mail-pb0-f51.google.com with SMTP id ro12so3811252pbb.38 for ; Tue, 22 Jan 2013 00:25:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer :x-gm-message-state; bh=MrQk9ORGoUuYaCBKuIuwzYfYb3pC4+83tg9qmNRVFtE=; b=ForlmxKE+AoNxw70/h14MDNLp0km6te1Qt0pfNEW/nVKrZfbGjRRSSM2Rfg6fRJ7qL FN7ZKnoMZwBuLJbwGWpWXYj6XaBWSyGDg7//nUY5VbEG2IW9JvLiEVB15Szw9ZU3DpGe gp9hU1MM8TRH2FGGGH0F/QDO5WrVYPoyvLrHNMao4/kbDYRQO6EtTWC1V86jWFYhokhJ e7RUV1VY2tCcEAw4kVzNRaGICWGkIT67Y12w9Knp9w4F4odj5C+RfRl2/Pyo2lLckXyo 55WIKGVjc+VNQ1obj0wp9nYebkukWZkNQNoI4VYiiYLbwRgTL6LC9bSIlf2zdIDg+crJ 49Fg== X-Received: by 10.68.234.36 with SMTP id ub4mr37369464pbc.68.1358843118549; Tue, 22 Jan 2013 00:25:18 -0800 (PST) Received: from inder-ubuntu.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPS id i5sm10979835pax.13.2013.01.22.00.25.15 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 22 Jan 2013 00:25:17 -0800 (PST) From: Inderpal Singh To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH] arm: plat-samsung: check soc ids before l2x0 cache restoration in resume Date: Tue, 22 Jan 2013 13:55:09 +0530 Message-Id: <1358843109-11072-1-git-send-email-inderpal.singh@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQlhkZvwOTIRdRWgQlmeeSNPa0G9qzrIu378toiDpKylksXi2+m0yVGnflEZUFYIcrM2MmBa X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130122_032520_642431_2BCDAFDE X-CRM114-Status: GOOD ( 12.47 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.51 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kgene.kim@samsung.com, patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Only exynos4 based platforms have l2x0 cache controller. Hence check the same before restoring the cache in resume. This is needed for single kernel image. Signed-off-by: Inderpal Singh --- arch/arm/mach-exynos/common.c | 2 ++ arch/arm/plat-samsung/include/plat/pm.h | 1 + arch/arm/plat-samsung/s5p-sleep.S | 28 ++++++++++++++++++++++++++++ 3 files changed, 31 insertions(+) diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index cdaa55f..ab7ca00 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -796,6 +796,8 @@ static int __init exynos4_l2x0_cache_init(void) if (soc_is_exynos5250() || soc_is_exynos5440()) return 0; + s5p_cpu = samsung_cpu_id & EXYNOS4_CPU_MASK; + ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); if (!ret) { l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h index 887a0c9..285c8c8 100644 --- a/arch/arm/plat-samsung/include/plat/pm.h +++ b/arch/arm/plat-samsung/include/plat/pm.h @@ -190,3 +190,4 @@ extern void samsung_pm_save_gpios(void); extern void s3c_pm_save_core(void); extern void s3c_pm_restore_core(void); +extern unsigned long s5p_cpu; diff --git a/arch/arm/plat-samsung/s5p-sleep.S b/arch/arm/plat-samsung/s5p-sleep.S index bdf6dad..006d35f 100644 --- a/arch/arm/plat-samsung/s5p-sleep.S +++ b/arch/arm/plat-samsung/s5p-sleep.S @@ -25,6 +25,15 @@ #include #include +#define EXYNOS4210_CPU_ID 0x43210000 +#define EXYNOS4212_CPU_ID 0x43220000 +#define EXYNOS4412_CPU_ID 0xE4412200 +#define EXYNOS4_CPU_MASK 0xFFFE0000 + +#define EXYNOS4210_CPU (EXYNOS4210_CPU_ID & EXYNOS4_CPU_MASK) +#define EXYNOS4212_CPU (EXYNOS4212_CPU_ID & EXYNOS4_CPU_MASK) +#define EXYNOS4412_CPU (EXYNOS4412_CPU_ID & EXYNOS4_CPU_MASK) + /* * The following code is located into the .data section. This is to * allow l2x0_regs_phys to be accessed with a relative load while we @@ -51,6 +60,22 @@ ENTRY(s3c_cpu_resume) #ifdef CONFIG_CACHE_L2X0 + adr r0, s5p_cpu + ldr r1, [r0] + + ldr r0, =EXYNOS4210_CPU + cmp r1, r0 + beq continue + + ldr r0, =EXYNOS4212_CPU + cmp r1, r0 + beq continue + + ldr r0, =EXYNOS4412_CPU + cmp r1, r0 + bne resume_l2on + +continue: adr r0, l2x0_regs_phys ldr r0, [r0] ldr r1, [r0, #L2X0_R_PHY_BASE] @@ -77,4 +102,7 @@ ENDPROC(s3c_cpu_resume) .globl l2x0_regs_phys l2x0_regs_phys: .long 0 + .globl s5p_cpu +s5p_cpu: + .long 0 #endif