From patchwork Wed Jan 23 08:25:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 2022821 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 80BA73FD86 for ; Wed, 23 Jan 2013 08:29:57 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Txvfs-0000Yh-Sv; Wed, 23 Jan 2013 08:27:12 +0000 Received: from mail-pa0-f51.google.com ([209.85.220.51]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Txvez-0000JX-TB for linux-arm-kernel@lists.infradead.org; Wed, 23 Jan 2013 08:26:19 +0000 Received: by mail-pa0-f51.google.com with SMTP id fb11so4618534pad.24 for ; Wed, 23 Jan 2013 00:26:16 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=RBiMx2yDQrLtBuyJCWEKC5TygQoVSWebk2cyD7pI7HM=; b=nrrpIstus/vyA3WdN6Gb7Q71wDPGoC1YSfIV3Qes+J6owAWMoE56VNawwlaUtiAufo 2OQMCVKFUH9uxxz7e/DMvyeWUs1RsXJMHlDzl204rpRzfA1W5Tg5vDKvEDtdv5JnGNLU P1rz6I3bL5UC/7CtmMhnqMx0XGdElnD/val5kGMaspj6dRO+UNNzWhquaZX6B+lCc3HH +kFK1n82pufUp3Jgb4/65a23HpWSTzh0qkvzvYRDyUMIY0r4r36UhJaph2th/Dr7zDjX ZM613CoXbgYGeax1smFu2QbvHx258rio0i/lzM/9jpxzwXPQdYOpgrTG15tnBS406UvJ lNww== X-Received: by 10.66.89.199 with SMTP id bq7mr2590445pab.26.1358929576642; Wed, 23 Jan 2013 00:26:16 -0800 (PST) Received: from localhost.localdomain ([98.126.173.75]) by mx.google.com with ESMTPS id qf7sm12392126pbb.49.2013.01.23.00.26.13 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 23 Jan 2013 00:26:16 -0800 (PST) From: Haojian Zhuang To: linux@arm.linux.org.uk, marek.vasut@gmail.com, robert.jarzmik@free.fr, daniel@caiaq.de, linux-arm-kernel@lists.infradead.org, linus.walleij@linaro.org, grant.likely@secretlab.ca, cxie4@marvell.com Subject: [PATCH 04/10] gpio: pxa: use platform data for gpio inverted Date: Wed, 23 Jan 2013 16:25:48 +0800 Message-Id: <1358929554-32265-5-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1358929554-32265-1-git-send-email-haojian.zhuang@linaro.org> References: <1358929554-32265-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQk946dXykIimfL+85IrwkdSMERisfIUp5tVL0ptEID9jb87uw9pMP7cC6oU9tSlUPQswfCE X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130123_032618_164180_1D39CD3A X-CRM114-Status: GOOD ( 17.16 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.51 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang , patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Avoid to judge whether gpio is inverted by identifying cpu in gpio driver. Move this into platform data of gpio driver. Signed-off-by: Haojian Zhuang --- arch/arm/mach-pxa/pxa25x.c | 3 +++ drivers/gpio/gpio-pxa.c | 41 ++++++++++++++++++++++++++--------------- include/linux/gpio-pxa.h | 1 + 3 files changed, 30 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index f4c293a..8d77090 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -340,6 +340,9 @@ void __init pxa25x_map_io(void) } static struct pxa_gpio_platform_data pxa25x_gpio_info __initdata = { +#ifdef CONFIG_CPU_PXA26x + .inverted = 1, +#endif .gpio_set_wake = gpio_set_wake, }; diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index da6e7fd..6d61a69 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c @@ -71,6 +71,7 @@ struct pxa_gpio_chip { struct gpio_chip chip; void __iomem *regbase; unsigned int irq_base; + unsigned int inverted; char label[10]; unsigned long irq_mask; @@ -126,9 +127,9 @@ static inline int gpio_is_mmp_type(int type) /* GPIO86/87/88/89 on PXA26x have their direction bits in PXA_GPDR(2 inverted, * as well as their Alternate Function value being '1' for GPIO in GAFRx. */ -static inline int __gpio_is_inverted(int gpio) +static inline int __gpio_is_inverted(struct pxa_gpio_chip *chip, int gpio) { - if ((gpio_type == PXA26X_GPIO) && (gpio > 85)) + if ((chip->inverted) && (gpio > 85)) return 1; return 0; } @@ -139,15 +140,13 @@ static inline int __gpio_is_inverted(int gpio) * is attributed as "occupied" here (I know this terminology isn't * accurate, you are welcome to propose a better one :-) */ -static inline int __gpio_is_occupied(unsigned gpio) +static inline int __gpio_is_occupied(struct pxa_gpio_chip *chip, unsigned gpio) { - struct pxa_gpio_chip *pxachip; void __iomem *base; unsigned long gafr = 0, gpdr = 0; int ret, af = 0, dir = 0; - pxachip = gpio_to_pxachip(gpio); - base = gpio_chip_base(&pxachip->chip); + base = gpio_chip_base(&chip->chip); gpdr = readl_relaxed(base + GPDR_OFFSET); switch (gpio_type) { @@ -158,7 +157,7 @@ static inline int __gpio_is_occupied(unsigned gpio) af = (gafr >> ((gpio & 0xf) * 2)) & 0x3; dir = gpdr & GPIO_bit(gpio); - if (__gpio_is_inverted(gpio)) + if (__gpio_is_inverted(chip, gpio)) ret = (af != 1) || (dir == 0); else ret = (af != 0) || (dir != 0); @@ -188,16 +187,19 @@ int pxa_irq_to_gpio(struct irq_data *d) return gpio; } -static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) +static int pxa_gpio_direction_input(struct gpio_chip *gc, unsigned offset) { - void __iomem *base = gpio_chip_base(chip); + struct pxa_gpio_chip *chip = NULL; + void __iomem *base = gpio_chip_base(gc); uint32_t value, mask = 1 << offset; unsigned long flags; + chip = container_of(gc, struct pxa_gpio_chip, chip); + spin_lock_irqsave(&gpio_lock, flags); value = readl_relaxed(base + GPDR_OFFSET); - if (__gpio_is_inverted(chip->base + offset)) + if (__gpio_is_inverted(chip, gc->base + offset)) value |= mask; else value &= ~mask; @@ -207,19 +209,22 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) return 0; } -static int pxa_gpio_direction_output(struct gpio_chip *chip, +static int pxa_gpio_direction_output(struct gpio_chip *gc, unsigned offset, int value) { - void __iomem *base = gpio_chip_base(chip); + struct pxa_gpio_chip *chip = NULL; + void __iomem *base = gpio_chip_base(gc); uint32_t tmp, mask = 1 << offset; unsigned long flags; + chip = container_of(gc, struct pxa_gpio_chip, chip); + writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET)); spin_lock_irqsave(&gpio_lock, flags); tmp = readl_relaxed(base + GPDR_OFFSET); - if (__gpio_is_inverted(chip->base + offset)) + if (__gpio_is_inverted(chip, gc->base + offset)) tmp &= ~mask; else tmp |= mask; @@ -288,7 +293,7 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) if ((c->irq_edge_rise | c->irq_edge_fall) & GPIO_bit(gpio)) return 0; - if (__gpio_is_occupied(gpio)) + if (__gpio_is_occupied(c, gpio)) return 0; type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; @@ -296,7 +301,7 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); - if (__gpio_is_inverted(gpio)) + if (__gpio_is_inverted(c, gpio)) writel_relaxed(gpdr | mask, c->regbase + GPDR_OFFSET); else writel_relaxed(gpdr & ~mask, c->regbase + GPDR_OFFSET); @@ -475,6 +480,10 @@ static int pxa_gpio_probe_dt(struct platform_device *pdev) ret = of_find_property(np, "marvell,gpio-ed-mask", NULL); if (ret) pdata->ed_mask = 1; + /* It's only valid for PXA26x */ + ret = of_find_property(np, "marvell,gpio-inverted", NULL); + if (ret) + pdata->inverted = 1; /* set the platform data */ pdev->dev.platform_data = pdata; gpio_type = (int)of_id->data; @@ -617,6 +626,8 @@ static int pxa_gpio_probe(struct platform_device *pdev) /* unmask GPIO edge detect for AP side */ if (info->ed_mask) writel_relaxed(~0, c->regbase + ED_MASK_OFFSET); + /* update for gpio inverted */ + c->inverted = info->inverted; } if (!use_of) { diff --git a/include/linux/gpio-pxa.h b/include/linux/gpio-pxa.h index bdee118..c8d07be5 100644 --- a/include/linux/gpio-pxa.h +++ b/include/linux/gpio-pxa.h @@ -17,6 +17,7 @@ extern int pxa_irq_to_gpio(struct irq_data *d); struct pxa_gpio_platform_data { unsigned ed_mask; /* not 0 means ed_mask reg is available */ + unsigned inverted; /* only valid for PXA26x */ int (*gpio_set_wake)(unsigned int gpio, unsigned int on); };