From patchwork Thu Jan 24 03:45:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Patil, Rachna" X-Patchwork-Id: 2028941 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id C94333FCD5 for ; Thu, 24 Jan 2013 03:47:56 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TyDkc-0005tb-7V; Thu, 24 Jan 2013 03:45:18 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TyDkX-0005sm-Ft for linux-arm-kernel@lists.infradead.org; Thu, 24 Jan 2013 03:45:14 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id r0O3j0QJ030380; Wed, 23 Jan 2013 21:45:01 -0600 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r0O3ixm1002728; Thu, 24 Jan 2013 09:14:59 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Thu, 24 Jan 2013 09:14:59 +0530 Received: from ucmsshproxy.india.ext.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with SMTP id r0O3ixpN016124; Thu, 24 Jan 2013 09:14:59 +0530 Received: from symphony.india.ext.ti.com (unknown [192.168.247.13]) by ucmsshproxy.india.ext.ti.com (Postfix) with ESMTP id 8F30B158003; Thu, 24 Jan 2013 09:14:58 +0530 (IST) Received: from ubuntu-psp-linux.india.ext.ti.com (ubuntu-psp-linux [192.168.247.46]) by symphony.india.ext.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id r0O3iwR15448; Thu, 24 Jan 2013 09:14:58 +0530 (IST) From: "Patil, Rachna" To: , , , , , , Subject: [PATCH v4 1/8] input: ti_am335x_tsc: Step enable bits made configurable Date: Thu, 24 Jan 2013 09:15:05 +0530 Message-ID: <1358999112-31192-2-git-send-email-rachna@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1358999112-31192-1-git-send-email-rachna@ti.com> References: <1358999112-31192-1-git-send-email-rachna@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130123_224513_616000_E22FA194 X-CRM114-Status: GOOD ( 14.67 ) X-Spam-Score: -4.6 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.153 listed in list.dnswl.org] 3.0 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Russell King , Samuel Ortiz , Tony Lindgren , Dmitry Torokhov , Dmitry Torokhov , Rob Herring , gururaja.hebbar@ti.com, Grant Likely , Jonathan Cameron , Rob Landley , "Patil, Rachna" , Benit Cousson X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: "Patil, Rachna" Current code has hard coded value written to step enable bits. Now the bits are updated based on how many steps are needed to be configured got from platform data. The user needs to take care not to exceed the count more than 16. While using ADC and TSC one should take care to set this parameter correctly. Signed-off-by: Patil, Rachna --- drivers/input/touchscreen/ti_am335x_tsc.c | 10 ++++++++-- include/linux/mfd/ti_am335x_tscadc.h | 1 - 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/input/touchscreen/ti_am335x_tsc.c b/drivers/input/touchscreen/ti_am335x_tsc.c index 51e7b87..da652e0 100644 --- a/drivers/input/touchscreen/ti_am335x_tsc.c +++ b/drivers/input/touchscreen/ti_am335x_tsc.c @@ -39,6 +39,7 @@ struct titsc { unsigned int irq; unsigned int wires; unsigned int x_plate_resistance; + unsigned int enable_bits; bool pen_down; int steps_to_configure; }; @@ -57,6 +58,7 @@ static void titsc_writel(struct titsc *tsc, unsigned int reg, static void titsc_step_config(struct titsc *ts_dev) { unsigned int config; + unsigned int stepenable = 0; int i, total_steps; /* Configure the Step registers */ @@ -128,7 +130,11 @@ static void titsc_step_config(struct titsc *ts_dev) titsc_writel(ts_dev, REG_STEPDELAY(total_steps + 2), STEPCONFIG_OPENDLY); - titsc_writel(ts_dev, REG_SE, STPENB_STEPENB_TC); + for (i = 0; i <= (total_steps + 2); i++) + stepenable |= 1 << i; + ts_dev->enable_bits = stepenable; + + titsc_writel(ts_dev, REG_SE, ts_dev->enable_bits); } static void titsc_read_coordinates(struct titsc *ts_dev, @@ -250,7 +256,7 @@ static irqreturn_t titsc_irq(int irq, void *dev) titsc_writel(ts_dev, REG_IRQSTATUS, irqclr); - titsc_writel(ts_dev, REG_SE, STPENB_STEPENB_TC); + titsc_writel(ts_dev, REG_SE, ts_dev->enable_bits); return IRQ_HANDLED; } diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index c79ad5d..23e4f33 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -47,7 +47,6 @@ #define STEPENB_MASK (0x1FFFF << 0) #define STEPENB(val) ((val) << 0) #define STPENB_STEPENB STEPENB(0x1FFFF) -#define STPENB_STEPENB_TC STEPENB(0x1FFF) /* IRQ enable */ #define IRQENB_HW_PEN BIT(0)